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CRC & Hamming Code

The document discusses Hamming code, a widely used error correction technique that employs multiple parity bits to detect and correct errors in data transmission. It outlines the relationship between the parameters n and k in Hamming codes, the process of encoding and decoding, and the creation of syndromes to identify errors. Additionally, it introduces cyclic codes and cyclic redundancy checks (CRC), explaining their application in networks and providing examples of their implementation.

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0% found this document useful (0 votes)
21 views23 pages

CRC & Hamming Code

The document discusses Hamming code, a widely used error correction technique that employs multiple parity bits to detect and correct errors in data transmission. It outlines the relationship between the parameters n and k in Hamming codes, the process of encoding and decoding, and the creation of syndromes to identify errors. Additionally, it introduces cyclic codes and cyclic redundancy checks (CRC), explaining their application in networks and providing examples of their implementation.

Uploaded by

deenahurooj6694
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Hamming code

■ The most commonly used error correction technique


is Hamming code.

■ In this technique multiple parity bits are inserted


into the data block before transmission

■ These codes originally designed with dmin=3 which


means they can detect up to 2 errors or correct one
single error.
■ Now we find relationship between
n & k in a Hamming code

We need to choose an integer m>=3 so that values


of n & k calculated from m

n=(2 power m) -1
k=n-m

For example m=3 , n=7 , k =4

The Hamming code C(7,4) with dmin=3


Hamming code C(7, 4)

10.3
The structure of the encoder and decoder for a Hamming code

10.4
■ A copy of 4 bit data word is fed into the generator that creates 3
parity checks r0, r1 and r2 as shown below

r0 =a2+a1+a0 (modulo-2)
r1 =a3+a2+a1 (modulo-2)
r2 =a1+a0+a3 (modulo-2)

Each parity bit handles 3 out of 4 bits of the data word.

10.5
■ The checker in the decoder creates a 3 bit
syndrome(S2, S1,S0) in which each bit is parity check
for 4 out of 7 bits in the received code.
S0 =b2+b1+b0+q0 (modulo-2)
S1 =b3+b2+b1+q1 (modulo-2)
S2 =b1+b0+b3 +q2 (modulo-2)

10.6
■ The equations used by the checker are same as those used by
generator with the parity check bits added to the right-hand
side
■ The 3 bit syndrome(S0,S1,S2) creates 8 different bit
patterns(000 to 111)that can represent 8 different conditions.
■ These conditions define lack of error or an error in 1 of the 7
bits of the received code word

Logical decision made by the correction logic analyzer

10.7
Syndrome values in table are based on the syndrome
bit calculations.
■ For example if q0 is in error s0 is the only bit
affected ; the syndrome therefore is 001( s2=0,s1=0 s0=1)
■ if b2 is in error S0 & S1 is the only bit affected ; the
syndrome therefore is 011 ( s2=0,s1=1 s0=1)
■ Similarly b1 is in error all 3 syndrome bits are
affected and the syndrome is 111.
S0 =b2+b1+b0+q0 (modulo-2)
S1 =b3+b2+b1+q1 (modulo-2)
S2 =b1+b0+b3 +q2 (modulo-2)

10.8
Example
Let us trace the path of data words from the sender to the
destination:

1.The data word 0100 (a3=0, a2=1,a1=0 ,a0=0) becomes the codeword
0100011. The codeword 0100011 is received. The syndrome is 000,
the final data word is 0100.
r0 =a2+a1+a0(modulo-2)
r1 =a3+a2+a1 (modulo-2)
r2 =a1+a0+a3 (modulo-2)

S0=b2+b1+b0+q0 (modulo-2)
S1 =b3+b2+b1+q1 (modulo-2)
S2 =b1+b0+b3 +q2 (modulo-2)

10.9
■ The data word 0111 becomes the codeword
0111001.The codeword 0011001 is received. The
syndrome is 011. b2 is in error. After flipping
b2(changing 1 to 0),the final data word is 0111

■ 0111001
■ 0011001

10.10
CYCLIC CODES
Cyclic codes are special linear block codes with one
extra property. In a cyclic code, if a codeword is
cyclically shifted (rotated), the result is another
codeword.

10.11
Cyclic redundancy check (CRC)

■ A category of cyclic codes called the Cyclic redundancy


check is used in networks such as LAN and WANs

■ The below figure shows the CRC encoder and decoder


and shows an example table of a CRC code

10.12
CRC encoder and decoder

10.13
■ In the encoder, the data word has k bits
(4 here); the codeword has n bits (7 here).

■ The size of the dataword is augmented by


adding n - k (3 here) 0’s to the right-hand side
of the word.

■ The n-bit result is fed into the generator.

■ The generator uses a divisor of size n - k + 1 (4


here).
10.14
■ The quotient of the division is discarded; the
remainder (r2,r1,ro) is appended to the
dataword to create the codeword.

■ The decoder receives the possibly corrupted


codeword. A copy of all n bits is fed to the
checker which is a replica of the generator.

■ The remainder produced by the checker is a


syndrome of n - k (3 here) bits, which is fed to
the decision logic analyzer.

10.15
■ The analyzer has a simple function. If the
syndrome bits are all as 0’s, the 4 leftmost bits
of the codeword are accepted as the data word
(interpreted as no error); otherwise, the 4 bits
are discarded (error).

10.16
Figure 10.15 Division in CRC encoder

10.17
Figure 10.16 Division in the CRC decoder for two cases

10.18
■ Consider the CRC generator is x7 + x6 +
x4 + x3 + x + 1.

10.19
■ Example 1

■ A bit stream 1101011011 is transmitted using the


standard CRC method. The generator polynomial is
x4+x+1. What is the actual bit string transmitted?

■ The generator polynomial G(x) = x4 + x + 1 is encoded


as 10011.
■ Clearly, the generator polynomial consists of 5 bits.
■ So, a string of 4 zeroes is appended to the bit stream to
be transmitted.
■ The resulting bit stream is 11010110110000.
10.21
■ Example 2
■ A bit stream 10011101 is transmitted using the
standard CRC method. The generator polynomial
is x3+1.

■ The generator polynomial G(x) = x3 + 1 is


encoded as 1001.
■ Clearly, the generator polynomial consists of 4
bits.
■ So, a string of 3 zeroes is appended to the bit
stream to be transmitted.
■ The resulting bit stream is 10011101000.

10.22
according to the question, Third bit from the left gets inverted during transmission.
So, the bit stream received by the receiver = 10111101100

10.23

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