1000 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 25, NO.

6, 2006

Synthesis of Quantum-Logic Circuits

Vivek V. Shende, Stephen S. Bullock, and Igor L. Markov, Senior Member, IEEE

Abstract—The pressure of fundamental limits on classical com- I. I NTRODUCTION

putation and the promise of exponential speedups from quantum
effects have recently brought quantum circuits (Proc. R. Soc.
Lond. A, Math. Phys. Sci., vol. 425, p. 73, 1989) to the atten-
tion of the electronic design automation community (Proc. 40th
A S THE ever-shrinking transistor approaches atomic pro-
portions, Moore’s law must confront the small-scale
granularity of the world: We cannot build wires thinner than
ACM/IEEE Design Automation Conf., 2003), (Phys. Rev. A, At. Mol. atoms. Worse still, at atomic dimensions, we must contend with
Opt. Phy., vol. 68, p. 012318, 2003), (Proc. 41st Design Automation
Conf., 2004), (Proc. 39th Design Automation Conf., 2002), (Proc. the laws of quantum mechanics. For example, suppose 1 bit
Design, Automation, and Test Eur., 2004), (Phys. Rev. A, At. Mol. is encoded as the presence or the absence of an electron in a
Opt. Phy., vol. 69, p. 062321, 2004), (IEEE Trans. Comput.-Aided small region.1 Since we know very precisely where the electron
Des. Integr. Circuits Syst., vol. 22, p. 710, 2003). Efficient quantum– is located, the Heisenberg uncertainty principle dictates that
logic circuits that perform two tasks are discussed: 1) implement- we cannot know its momentum with high accuracy. Without
ing generic quantum computations, and 2) initializing quantum
registers. In contrast to conventional computing, the latter task a reasonable upper bound on the electron’s momentum, there
is nontrivial because the state space of an n-qubit register is not is no alternative but to use a large potential to keep it in place,
finite and contains exponential superpositions of classical bit- and expend significant energy during logic switching. A quan-
strings. The proposed circuits are asymptotically optimal for re- titative analysis of these phenomena leads experts from North
spective tasks and improve earlier published results by at least a Carolina State University (NCSU), Semiconductor Research
factor of 2.
The circuits for generic quantum computation constructed by Corporation (SRC), and Intel [38] to derive fundamental lim-
the algorithms are the most efficient known today in terms of itations on the scalability of any computing device that moves
the number of most expensive gates [quantum controlled-NOTs electrons.
(CNOTs)]. They are based on an analog of the Shannon decom- However, these same quantum effects also facilitate a radi-
position of Boolean functions and a new circuit block, called cally different form of computation [14]. Theoretically, quan-
quantum multiplexor (QMUX), which generalizes several known
constructions. A theoretical lower bound implies that the circuits tum computers could outperform their classical counterparts
cannot be improved by more than a factor of 2. It is additionally when solving certain discrete problems [17]. For example, a
shown how to accommodate the severe architectural limitation successful large-scale implementation of Shor’s integer factor-
of using only nearest neighbor gates, which is representative of ization [31] would compromise the Rivest Shamir Adelman
current implementation technologies. This increases the number (RSA) cryptosystem used in electronic commerce. On the other
of gates by almost an order of magnitude, but preserves the
asymptotic optimality of gate counts. hand, quantum effects may also be exploited for public-key
cryptography [4]. Indeed, such cryptography systems, based on
Index Terms—Application specific integrated circuits, circuit single-photon communication, are commercially available from
analysis, circuit optimization, circuit synthesis, circuit topology,
design automation, logic design, matrix decompositions, quantum MagiQ Technologies in the U.S. and IdQuantique in Europe.
effect semiconductor devices, quantum theory. Physically, a quantum bit might be stored in one of a
variety of quantum-mechanical systems. A broad survey of
these implementation technologies, with feasibility estimates
and forecasts, is available in the form of the quantum computing
roadmap [1]. Sample carriers of quantum information include
top electrons in hyperfine energy levels of either trapped atoms
or trapped ions, tunneling currents in cold superconductors,
Manuscript received October 31, 2004; revised March 7, 2005. This work
was supported by the Defense Advanced Research Projects Agency (DARPA) nuclear spin polarizations in nuclear magnetic resonance, and
Quantum Information Science and Technology (QuIST) program and by a polarization states of single photons. A collection of n such
National Science Foundation (NSF) grant. The work of S. S. Bullock was systems would comprise an n-qubit register, and quantum-logic
supported by a National Research Council (NRC) postdoctoral fellowship. This
paper was recommended by Associate Editor L. Stok. gates (controlled quantum processes) would then be applied to
V. V. Shende is with the University of California, Berkeley, CA 94720 the register to perform a computation. In practice, such gates
USA, on leave from the Department of Electrical Engineering and Computer
Science, The University of Michigan, Ann Arbor, MI 48109-2212 USA (e-mail:
might result from rotating the electron between hyperfine levels
[email protected]; [email protected]). by shining a laser beam on the trapped atom/ion, tuning the
S. S. Bullock was with the Mathematical and Computational Sciences tunneling potential by changing voltages and/or current in a
Division, National Institute of Standards and Technology, Gaithersburg, MD
20899-8910 USA. He is now with Institute for Defense Analyses Center for
superconducting circuit, or perhaps passing multiple photons
Computing Sciences, 17100 Science Drive, Bowie, MD 20715-4300 USA through very efficient nonlinear optical media.
(e-mail: [email protected]; [email protected]).
I. L. Markov is with the Department of Electrical Engineering and Computer
Science, The University of Michigan, Ann Arbor, MI 48109-2212 USA.
1 Most current computing technologies use electron charges to store informa-
(e-mail:[email protected]).
Digital Object Identifier 10.1109/TCAD.2005.855930 tion; exceptions include spintronics-based techniques, e.g., magnetic RAM.

0278-0070/$20.00 © 2006 IEEE

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SHENDE et al.: SYNTHESIS OF QUANTUM-LOGIC CIRCUITS 1001

The logical properties of qubits also differ significantly from Existing algorithms for n-qubit circuit synthesis remain a
those of classical bits. Bits and their manipulation can be factor of 4 away from lower bounds and fare poorly for small n.
described using two constants (0 and 1) and the tools of Boolean These algorithms require at least eight CNOT gates for n = 2,
algebra. Qubits, on the other hand, must be discussed in terms while three CNOT gates are necessary and sufficient in the
of vectors, matrices, and other linear algebraic constructions. worst case [28], [29], [35], [36]. Further, a simple procedure
We will fully specify the formalism in Section II, but give a exists to produce two-qubit circuits with minimal possible
rough idea of the similarities and differences between classical number of CNOT gates [26]. In contrast, in three qubits, the
and quantum information below. lower bound is 14, while the generic n-qubit decomposition in
[22] achieves 48 CNOTs, and a specialty three-qubit circuit in
1) A readout (observation, measurement) of a quantum reg-
[34] achieves 40.
ister results in a classical bitstring.
In this paper, we focus on identifying useful quantum-
2) However, identically prepared quantum states may yield
circuit blocks. To this end, we analyze quantum conditionals
different classical bitstrings upon observation. Quantum
and define quantum multiplexors (QMUXs) that generalize
physics only predicts the probability of each possible
CNOT, Toffoli, and Fredkin gates. Such QMUXs implement
readout, and the readout probabilities of different bits in
if–then–else conditionals when the controlling predicate evalu-
the register need not be independent.
ates to a nonclassical state, e.g., coherent superposition of |0
3) After readout, the state “collapses” onto the classical
and |1. We find that QMUXs prove amenable to recursive
bitstring observed. All other quantum data are lost.
decomposition and vastly simplify the discussion of many
These differences notwithstanding, quantum-logic circuits, results in quantum-logic synthesis (cf., [9], [22], and [33]).
from a high level perspective, exhibit many similarities with Ultimately, our analysis leads to a quantum analog of the
their classical counterparts. They consist of quantum gates, Shannon decomposition, which we apply to the problem of
connected (though without fan-out or feedback) by quantum quantum-logic synthesis.
wires that carry quantum bits. Moreover, logic synthesis for We contribute the following key results.
quantum circuits is as important as for the classical case. In
1) An arbitrary n-qubit quantum state can be prepared by a
current implementation technologies, gates that act on three or
circuit containing no more than 2n+1 − 2n CNOT gates.
more qubits are prohibitively difficult to implement directly.
This lies a factor of 4 away from the theoretical lower
Thus, implementing a quantum computation as a sequence of
bound.
two-qubit gates is of crucial importance. Two-qubit gates may,
2) An arbitrary n-qubit operator can be implemented in a
in turn, be decomposed into circuits containing one-qubit gates
circuit containing no more than (23/48) × 4n − (3/2) ×
and a standard two-qubit gate, usually the quantum controlled-
2n + 4/3 CNOT gates. This improves upon the best
NOT (CNOT). These decompositions are done by hand for
previously published work by a factor of 2 and lies less
published quantum algorithms (e.g., Shor’s factorization algo-
than a factor of 2 away from the theoretical lower bound.
rithm [31] or Grover’s quantum search [17]), but have long
3) In the special case of three qubits, our technique yields a
been known to be possible for arbitrary quantum functions
circuit with 20 CNOT gates, whereas the best previously
[3], [13]. While CNOTs are used in an overwhelming majority
known result was 40.
of theoretical and practical work in quantum circuits, their
4) The architectural limitation of permitting only nearest
implementations are orders of magnitude more error prone
neighbor interactions, common to physical implementa-
than implementations of single-qubit gates and have greater
tions, does not change the asymptotic behavior of our
gate delays. Therefore, the cost of a quantum circuit can be
techniques.
realistically calculated by counting CNOT gates. Moreover, it
has been shown previously that if CNOT is the only two-qubit In addition to these technical advances, we develop a theory
gate type used, the number of such gates in a sufficiently large of QMUXs that parallels well-known concepts in digital logic,
irredundant circuit is lower bounded by approximately 20% such as Shannon decomposition of Boolean functions. This new
[28], [29]. theory produces short and intuitive proofs of many results for
The first quantum-logic-synthesis algorithm to decompose n-qubit circuits known today.
an arbitrary n-qubit gate would return a circuit containing The remainder of the paper is organized as follows. In
O(n3 4n ) CNOT gates [3]. The study in [10] interprets this algo- Section II, we define quantum bits, quantum logic, and quantum
rithm as the QR decomposition, which is well known in matrix circuits, and we introduce the necessary mathematical formal-
algebra. Improvements on this method have used clever circuit ism for manipulating them. In Section III, we introduce a novel
transformations and/or Gray codes [2], [21], [33] to lower this circuit block, the QMUX, which immediately allows radical
gate count. More recently, different techniques [22] have led to notational simplifications of the statements and proofs of previ-
circuits with CNOT counts of 4n − 2n+1 . The exponential gate ously known results. In Section IV, we give a novel asymptoti-
count is not unexpected; just as the exponential number of n-bit cally optimal algorithm for register initialization and indicate
Boolean functions ensures that the circuits computing them are its applications to more general problems in quantum-logic
generically large, this is also true in the quantum case. Indeed, synthesis. In Section V, we use the cosine–sine decomposition
it has been shown that n-qubit operators generically require (CSD), along with a novel decomposition of single-select-bit
1/4(4n − 3n − 1) CNOTs [28], [29]. Similar exponential QMUXs, to derive a functional decomposition for quantum
lower bounds existed earlier in other gate libraries [21]. logic, which can be applied recursively. We obtain quantum
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1002 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 25, NO. 6, 2006

circuits to simulate any unitary operator (quantum evolution) the column vector whose bth entry is αb . As for a single
U and present competitive gate counts. In Section VI, we show qubit, |αb |2 represents the probability that a readout of |ψ
that our techniques adapt well to severe implementation con- yields
 the bitstring |b; thus, the αb are subject to the relation
2
straints representative of many quantum-circuit technologies. b |αb | = 1.
Our results are summarized in Section VII, which concludes the Suppose we concatenate an -qubit register L and an m-qubit
paper. Additionally, two highly technical aspects of our paper, register M to form an + m = n-qubit register N . Assuming
which are required to achieve the best gate counts, are described L and M have not previously interacted (and remain indepen-
in the Appendix. dent), we may describe them by state vectors |ψL  ∈ H and
|ψM  ∈ HM
II. B ACKGROUND AND N OTATION  
|ψL  = βb |b |ψM  = γb
|b . (5)
The notion of a qubit formalizes the logical properties of an b∈B b
∈Bm
ideal quantum-mechanical system with two basis states. The
two states are labeled |0 and |1. They can be distinguished To describe the state of N , we must somehow obtain from
by quantum measurement of the qubit, which yields a single |ψL  and |ψM  a state vector |ψN  ∈ Hn . Quantum mechan-
classical bit of information, specifying which state the qubit ics demands that we use a natural generalization of bitstring
was observed in. However, the state of an isolated (in par- concatenation called the tensor product. To compute the tensor
ticular, unobserved) qubit must be modeled by a vector in a product of two states, we write |ψN  = |ψL |ψM , and expand
two-dimensional complex2 vector space H1 , which is spanned it using the distributive law
by the basis states 
|ψL |ψM  = βb γb
|b|b . (6)
H1 = spanC {|0, |1} . (1) b∈B ,b
∈Bm

We identify |0 and |1 with the following column vectors: Let · denote concatenation; then, |b|b  and |b · b  represent


 the same bitstring state. As b · b ∈ Bn , we have |ψL |ψM  ∈
1 0 Hn , as desired.
|0 = |1 = . (2)
0 1 Perhaps counterintuitively, the quantum-mechanical state of
N cannot, in general, be specified only in terms of the states
Thus, an arbitrary state |φ ∈ H1 can be written in either of the of L and M . Indeed, Hk is a 2k -dimensional vector space,
two equivalent forms given below and for n 2, we observe 2n 2m + 2 . For example, three

 independent qubits can be described by three two-dimensional
α0
|φ = α0 |0 + α1 |1 = . (3) vectors, while a generic state vector of a three-qubit system
α1
is eight dimensional. Much interest in quantum computing is
The entries of the state vector determine the readout probabil- driven by this exponential scaling of the state space, and the
ities: If we measure a qubit whose state is described by |φ, loss of independence between different subsystems is called
we should expect to see |0 with probability |α0 |2 and |1 with quantum entanglement.
probability |α1 |2 . Since these are the only two possibilities, α0
and α1 are required to satisfy |α0 |2 + |α1 |2 = 1. B. Quantum-Logic Gates
By a quantum-logic gate, we shall mean a closed-system
A. Qubit Registers evolution (transformation) of the n-qubit state space Hn . In
particular, this means that no information is gained or lost
By a qubit register, we shall simply mean a logical qubit
during this evolution; thus, a quantum gate has the same number
array with a fixed number of qubits in a fixed order. A readout
of input qubits as output qubits. If |ψ is a state vector in Hn , the
of a qubit register amounts to readouts of each component
operation of an n-qubit quantum-logic gate can be represented
qubit; thus, a readout of an n-qubit register might take the form
by |ψ → U |ψ for some unitary 2n × 2n matrix U . To define
|b0 |b1  . . . |bn−1  for each bj ∈ {0, 1}. We shall abbreviate this
unitarity, we first introduce the adjoint of a matrix.
to |b0 b1 . . . bn−1 , and call it a bitstring state. Just as for a single
Notation: Let M be an n × m matrix. By M † , we will mean
qubit, the state of an isolated qubit register is modeled by a
the m × n matrix whose (i, j)th entry is the complex conjugate
vector in the complex vector space spanned by the bitstring
of the (j, i)th entry of M . In other words, M † is the conjugate
states
transpose of M .
Hn = spanC {|b; b a bitstring of length n} . (4) A square matrix M is unitary iff M † M = I for I an ×
identity matrix. This is the matrix equation for a symmetry: M
Writing Bn for the set of length-n bitstrings,
 an arbitrary is unitary iff the vector images of M have the same complex
vector |ψ ∈ Hn may be expressed as b∈Bn αb |b, or as
inner products as the original vectors. Thus: 1) identity matrices
are unitary; 2) a product of unitary matrices is unitary; and
2 Complex, rather than real, coefficients are required in most applications. For
3) the inverse of a unitary matrix, given by the adjoint, is
example, in certain optical implementations [23, Sec. 7.4.2] real and imaginary also unitary. These may be restated in terms of quantum logic.
parts encode both the presence and phase of a photon. The quantum-logic operation of “doing nothing” is modeled by
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SHENDE et al.: SYNTHESIS OF QUANTUM-LOGIC CIRCUITS 1003

the identity matrix, serial composition of gates is modeled by

the matrix products, and every quantum gate is reversible.
We shall often define quantum gates by simply specifying
their matrices. For example, the following matrix specifies a
quantum analog of the classical inverter: It maps |0 → |1 and
|1 → |0.

0 1 Fig. 1. Typical quantum-logic circuit. Information flows from left to right,
The inverter σx = . and the higher wires represent higher order qubits. The quantum operation per-
1 0 formed by this circuit is (U7 ⊗ U8 ⊗ U9 )(I2 ⊗ V3 )(V2 ⊗ I2 )(U4 ⊗ U5 ⊗
Many quantum gates are specified by time-dependent ma- U6 )(I2 ⊗ V1 )(U1 ⊗ U2 ⊗ U3 ), and the last factor is outlined above. Note that
trices that represent the evolution of a quantum system (e.g., when the matrix A · B is applied to vector v , this is equivalent to applying the
a radio-frequency electromagnetic pulse affecting the nuclear matrix B first, followed by the matrix A. Therefore, the formulas describing
quantum circuits must be read right to left.
spin of an atom) that has been “turned ON” for time θ. For
example, the following families of gates are the one-qubit C. Quantum Circuits
gates most commonly available in physical implementations of
quantum circuits: A combinational quantum-logic circuit consists of quantum
gates, interconnected by quantum wires—carrying qubits—

 without fan-out or feedback. As each quantum gate has the
cos θ/2 i sin θ/2
1) the x-axis rotation Rx (θ) = ; same number of inputs and outputs, any cut through the circuit

i sin θ/2 cos θ/2  crosses the same number of wires. Fixing an ordering on
cos θ/2 sin θ/2
2) the y-axis rotation Ry (θ) = ; and these, a quantum circuit can be understood as representing the
− sin θ/2 cosθ/2

−iθ/2 sequence of quantum-logic operations on a quantum register.
e 0
3) the z-axis rotation Rz (θ) = . An example is depicted in Fig. 1, and many more will appear
0 eiθ/2
throughout the paper.
Fig. 1 contains 12 one- and two-qubit gates applied to a three-
An arbitrary one-qubit computation can be implemented as a
qubit register. Observe that the state of a three-qubit register is
sequence of at most three Rz and Ry gates. This is due to the
described by a vector in H3 (an eight-element column), whereas
ZY Z decomposition:3 Given any 2 × 2 unitary matrix U , there
one- and two-qubit gates are described by unitary operations on
exist angles Φ, α, β, and γ satisfying the following equation:
H2 and H1 (given by 4 × 4 and 2 × 2 matrices, respectively).
In order to reconcile the dimensions of various state vectors and
U = eiΦ Rz (α)Ry (β)Rz (γ). (7)
matrices, we introduce the tensor product operation.
The nomenclature Rx , Ry , Rz is motivated by a picture of Consider an + m = n-qubit register, on which an -qubit
one-qubit states as points on the surface of a sphere of unit gate V acts on the top qubits, with an m-qubit gate W acting
radius in R3 . This picture is called the Bloch sphere [23], and on the remainder. We expand the state |ψ ∈ Hn of the n-qubit
may be obtained by expanding an arbitrary two-dimensional register as follows:
complex vector as follows:  
|ψ = αb |b = αb·b
|b|b . (10)
  b∈Bn b∈B ,b
∈Bm
it iϕ θ iϕ θ
|ψ = α0 |0 + α1 |1 = re 2 e− 2 cos |0 + e 2 sin |1 .
2 2 Then, denoting by V ⊗ W the operation performed on the
(8) register as a whole
The constant factor reit/2 is physically undetectable. Ignoring 
V ⊗ W |ψ = αb·b
(V |b) (W |b ) . (11)
it, we are left with two angular parameters θ and ϕ, which
b∈B ,b
∈Bm
we interpret as spherical coordinates (1, θ, ϕ). In this picture,
|0 and |1 correspond to the north and south poles, (1,0,0) Here, V |b ∈ H and W |b  ∈ HM are to be concatenated, or
and (1, π, 0), respectively. The Rx (θ) gate [Ry (θ), Rz (θ), tensored, as per (6). It can be deduced from (11) that the 2n ×
respectively] corresponds to a counterclockwise rotation by θ 2n matrix of V ⊗ W is given by
around the x (y, z, respectively) axis. Finally, just as the point
given by the spherical coordinates (1, θ, ϕ) can be moved to (V ⊗ W )r·r
,c·c
= Vr,c Wr
,c
for r, c ∈ B ; r , c ∈ Bm .
the north pole by first rotating −ϕ degrees around the z-axis, (12)
then −θ degrees around the y-axis, so do the following matrix
equations hold: D. Circuit Equivalences
it Rather than begin the statement of every theorem with “Let
Ry (−θ)Rz (−ϕ)|ψ = re 2 |0 U1 , U2 , . . . be unitary operators. . .,” we are going to use dia-
i(t−π)
Ry (θ − π)Rz (π − ϕ)|ψ = re 2 |1. (9) grams of quantum-logic circuits and circuit equivalences. An
equivalence of circuits in which all gates are fully specified
can be checked by multiplying matrices. However, in addition
3 This decomposition is well known and finds many proofs in the literature, to fully specified gates, our circuit diagrams will contain the
e.g., in [3]. We shall derive another as a corollary in Section IV. following generic or underspecified gates.
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1004 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 25, NO. 6, 2006

Notation: An equivalence of circuits containing generic this case, we denote U in quantum-logic circuit diagrams by
gates will mean that for any specification (i.e., parameter val- “
” on each select qubit, connected by a vertical line to a gate
ues) of the gates on one side, there exists a specification of on the remaining data (read–write) qubits.
the gates on the other such that the circuits compute the same In the event that a multiplexor has a single select bit, and the
operator. Generic gates used in this paper are limited to the select bit is most significant, the matrix of the QMUX is block
following. diagonal


A generic unitary gate. U0
U= . (13)
U1
An Rz gate without a specified angular parame-
ter; conventions for Rx , Ry are similar. The multiplexor will apply U0 or U1 to the data qubits accord-
ing to whether the select qubit carries |0 or |1. To express such
A generic diagonal gate. a block-diagonal decomposition, we shall use the notation U =
U0 ⊕ U1 , which is standard in linear algebra. More generally,
A generic scalar multiplication (uncontrolled gate let V be a multiplexor with s select qubits and a d-qubit-wide
implemented by “doing nothing”). data bus. If the select bits are most significant, the matrix of V
will be block diagonal, with 2s blocks of size 2d × 2d . The jth
We may restate (7) as an equivalence of generic circuits. block Vj is the operator applied to the data bits when the select
Theorem 1—ZY Z Decomposition [3]: bits carry |j.
In general, a gate depicted as a QMUX need not read or
modify as many qubits as indicated on a diagram. For example,
a multiplexor that performs the same operation on the data bits
regardless of what the select bits carry can be implemented
Similarly, we also allow underspecified states.
as an operation on the data bits alone. We give a less trivial
Notation: We shall interpret a circuit with underspecified
example below: A multiplexor that applies a different scalar
states and generic gates as an assertion that some specification
multiplication for each value of the select bits can be imple-
of the generic gates creates a circuit that performs as advertised
mented as a diagonal operator applied to the select bits.
for any specification of the underspecified input and output
Theorem 3—Recognizing Diagonals:
states. We shall denote a completely unspecified state as | ,
and an unspecified bitstring state as |∗.
For example, we may restate (9) in this manner.
Theorem 2—Preparation of One-Qubit States:

Indeed, both circuits represent diagonal matrices in which

each diagonal entry is repeated (at least) twice. In the former
We shall use a backslash to denote that a given wire may case, the repetition is due to a multiplexed scalar acting on the
carry an arbitrary number of qubits (quantum bus). In the least significant qubit, and in the latter, there is no attempt to
sequel, we seek backslashed analogs of Theorems 1 and 2. modify the least significant qubit.
We now clarify the meaning of multiplexed generic gates in
circuit diagrams, like that in the above circuit equivalence.
III. Q UANTUM C ONDITIONALS AND THE QMUX Notation: Let G be a generic gate. A specification U of
Classical conditionals can be described by the if−then− a multiplexed G gate can be any QMUX that effects a po-
else construction: if the predicate is true, perform the action tentially different specification of G on the data qubits for
specified in the then clause, if it is false, perform the action each bitstring appearing on the select qubits. Select qubits
specified in the else clause. At the gate level, such an operation may carry a superposition of several bitstring states, in which
might be performed by first processing the two clauses in paral- case the behavior of the multiplexed gate is defined by
lel, then multiplexing the output. To form the quantum analog, linearity.
we replace the predicate by a qubit, replace true and false by |1
and |0, and demand that the actions corresponding to clauses
A. QMUXs on Two Qubits
be unitary. The resulting “quantum conditional” operator U
will then be unitary. In particular, when selecting based on a Perhaps the simplest QMUX is the CNOT gate
coherent superposition α|0 + β|1, it will generate a linear
combination of the then and else outcomes. Below, we shall
use the term QMUX to refer to the circuit block implementing
a quantum conditional.
Notation: We shall say that a gate U is a QMUX with select
qubits S if it preserves any bitstring state |b carried by S. In (14)
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SHENDE et al.: SYNTHESIS OF QUANTUM-LOGIC CIRCUITS 1005

On bitstring states, the CNOT flips the second (data) bit if the exemplified by comparing two expressions involving condition-
first (select) bit is |1, hence, the name CNOT. The CNOT is so als in terms of a classical bit s.
common in quantum circuits that it has its own notation: a “•” 1) if (s) A0 · B0 else A1 · B1 .
on the select qubit connected by a vertical line to an “⊕” on the 2) As · Bs . Here, As means if (s)A0 else A1 , with the
data qubit. This notation is motivated by the characterization of syntax and semantics of (s?A0 : A1 ) in the C program-
the CNOT by the formula |b1 |b2  → |b1 |b1 XOR b2 . Several ming language.
CNOTs are depicted in Fig. 3.
The CNOT, together with the one-qubit gates defined in Indeed, one can either make a whole expression conditional
Section II, forms a universal gate library for quantum circuits.4 on s or make each term conditional on s—the two behaviors
In particular, we can use it as a building block to help construct will be identical. Similarly, one can multiplex a whole equation
more complicated multiplexors. For example, we can imple- (with two different instantiations of every term) or multiplex
ment the multiplexor Rz (θ0 ) ⊕ Rz (θ1 ) by the following circuit: each of its terms. The same applies to quantum multiplexing by
linearity.
MEP: Let C ≡ D be an equivalence of quantum circuits.
Let C be obtained from C by adding a wire that acts as a
multiplexor control for every generic gate in C, and let D be
obtained from D similarly. Then, C ≡ D .
In fact, the exact same statement holds if we replace Rz
Consider the special case of QMUXs with a single data bit,
by Ry (this can be verified by multiplying four matrices). We
but arbitrarily many select bits. We seek to implement such
summarize the result with a circuit equivalence.
multiplexors via CNOTs and one-qubit gates, beginning with
Theorem 4—Demultiplexing A Singly Multiplexed Ry or Rz :
the following decomposition.
Theorem 6—ZY Z Decomposition for Single-Data-Bit
Multiplexors:

A similar decomposition exists for any U ⊕ V where U

and V are one-qubit gates. The idea is to first unconditionally
apply V on the less significant qubit, and then apply A = U V † ,
conditioned on the more significant qubit. Decompositions for
such controlled A operators are well known [3], [10]. Indeed, Proof: Apply the MEP to Theorem 1, and Theorem 3 to
if we write A = eit Rz (α)Ry (β)Rz (γ) by Theorem 1, then the result. 
U ⊕ V is implemented by the following circuit: The diagonal gate appearing on the right can be recursively
decomposed.
Theorem 7—Decomposition of Diagonal Operators [9]:

Since V is a generic unitary, it can absorb adjacent one-qubit

boxes, simplifying the circuit. We re-express the result as a
circuit equivalence.
Theorem 5—Decompositions of a Two-Qubit Multiplexor Proof: The first equivalence asserts that any diagonal gate
[3]: can be expressed as a multiplexor of diagonal gates. This is true
because diagonal gates possess the block-diagonal structure
characteristic of multiplexors, with each block being diagonal.
The second equivalence amounts to the MEP applied to the
obvious fact that a one-qubit gate given by a diagonal matrix
Proof: The first equivalence is just a restatement of what is a scalar multiple of an Rz gate. The third follows from
we have already seen; the second follows from it by applying Theorem 3. 
a CNOT on the right to both sides and extracting a diagonal What remains is the decomposition of the other gates ap-
operator.  pearing on the right in the circuit diagram of Theorem 6. We
shall call these gates multiplexed Rz (or Ry ) gates,5 as, e.g., the
B. Multiplexor Extension Property (MEP) rightmost would apply a different Rz gate to the data qubit for
each classical configuration of the select bits. While efficient
The theory of n-qubit QMUXs begins with the observation
implementations are known [9], [22], the usual derivations
that whole circuits and even circuit equivalences can be mul-
involve large matrices and Gray codes.
tiplexed. This observation has nonquantum origins and can be

4 This was first shown in [13]. The results in the present work also constitute 5 Other authors have used the term uniformly controlled rotations to describe
a complete proof. these gates [22].
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1006 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 25, NO. 6, 2006

Theorem 8—Demultiplexing Multiplexed Rk Gates, k = y, z V. F UNCTIONAL D ECOMPOSITION FOR Q UANTUM L OGIC

[9], [22]:
Next, we introduce a decomposition for quantum logic that
is analogous to the well-known Shannon decomposition of
Boolean functions (f = xi fxi =1 + xi fxi =0 ). It expresses an
arbitrary n-qubit quantum operator in terms of (n − 1)-qubit
operators (cofactors) by means of QMUXs. Applying this de-
composition recursively yields a synthesis algorithm, for which
Proof: Apply the MEP to Theorem 4.  we compute gate counts.
It is worth noting that since every gate appearing in
Theorem 8 is symmetric, the order of gates in this A. Cosine–Sine Decomposition (CSD)
decomposition may be reversed. Recursive application of
Theorem 8 can decompose any multiplexed rotation into basic We recall the CSD from matrix algebra.6 It has been used
gates. In the process, some CNOT gates cancel, as is illustrated explicitly and regularly to build quantum circuits [22], [32] and
in Fig. 2. The final CNOT count is 2k , for k select bits. has also been employed inadvertently [6], [34].
The CSD states that an even-dimensional unitary matrix U ∈
C× can be decomposed into smaller unitaries A1 , A2 , B1 , B2
IV. P REPARATION OF Q UANTUM S TATES and real diagonal matrices C, S such that C 2 + S 2 = I/2




We present an asymptotically optimal technique for the ini- A1 C −S A2
tialization of a quantum register. The problem has been known U= .
B1 S C B2
for some time in quantum computing, and it was considered in
[12], [21], and [27] after the original formulation [11] of the For 2 × 2 matrices U , we may extract scalars out of the left
quantum-circuit model. It is also a computational primitive in and right factors to recover Theorem 1. For larger U , the left
designing larger quantum circuits. and right factors Aj ⊕ Bj are QMUXs controlled by the most
Theorem 9—Disentangling a Qubit: An arbitrary (n + 1)- significant qubit that determines whether Aj or Bj is to be
qubit state can be converted into a separable (i.e., unentangled) applied to the lower order qubits. The central factor has the
state by a circuit shown below. The resulting state is a tensor same structure as the Ry gate. A closer inspection reveals that
product involving a desired basis state (|0 or |1) on the less it applies a different Ry gate to the most significant bit for each
significant qubit classical configuration of the low order bits. Thus, the CSD can
be restated as the following equivalence of generic circuits.
Theorem 10—CSD [16], [25]:

Proof: We show how to produce |0 on the least signif-

icant bit; the case of |1 is similar. Let |ψ be an arbitrary
(n + 1)-qubit state. Divide the 2n+1 -element vector |ψ into It has been observed that this theorem may be recursively
2n contiguous two-element blocks. Each is to be interpreted as applied to the side factors on the right-hand side [32]. Indeed,
a two-dimensional complex vector, and the cth is to be labeled this can be achieved by adding more qubits via the MEP, as
|ψc . We now determine rc , tc , ϕc , and θc as in (9) shown below.
Theorem 11—Multiplexed CSD [32]:

Rz (−ϕc )Ry (−θc )|ψc  = rc eitc |0. (15)

Let |ψ  be the n-qubit state given by the 2n -element row vector

 cth entry rc e , and let U be the block-diagonal sum
itc
with
c Ry (−θc )Rz (−ϕc ). Then, U |φ = |φ |0, and U may be We may now outline the best previously published generic
implemented by a multiplexed Rz gate followed by a multi- quantum-logic synthesis algorithm [22]. The iterated applica-
plexed Ry .  tion of Theorem 11 to the decomposition of Theorem 10 gives a
We may apply Theorem 8 to implement the (n + 1)-bit decomposition of an arbitrary unitary operator into single-data-
circuit given above with 2n+1 CNOT gates. A slight optimiza- bit QMUX gates, some of which are already multiplexed Ry
tion is possible given that the gates on the right-hand side in gates. Those that are not can be decomposed into multiplexed
Theorem 8 can be optionally reversed, as explained above.
Indeed, if we reverse the decomposition of the multiplexed
6 The source code for computing the CSD can be obtained from Matlab
Ry gate, its first gate (CNOT) will cancel with the last gate
by typing “which gsvd” at a Matlab command prompt. On most laptops, this
(CNOT) from the decomposed multiplexed Rz gates. Thus, numerical computation scales to ten-qubit quantum operators, i.e., 1024 × 1024
only 2n+1 − 2 CNOT gates are needed. matrices.
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SHENDE et al.: SYNTHESIS OF QUANTUM-LOGIC CIRCUITS 1007

Fig. 2. Recursive decomposition of a multiplexed Rz gate. The boxed CNOT gates may be canceled.

rotations by Theorem 6, and then all the multiplexed rotations

can be decomposed into elementary gates by Theorem 8.
One weakness of this algorithm is that it cannot readily take
advantage of hand-optimized generic circuits on low numbers
of qubits [26], [28], [29], [35], [36]. This is because it is not
recursive on generic operators, but rather on multiplexors. Fig. 3. Implementing a long-range CNOT gate with nearest neighbor CNOTs.

C. Recursive Gate Counts for Universal Circuits

B. Demultiplexing Multiplexors, and the Quantum Shannon
Decomposition (QSD) We present gate counts for the circuit-synthesis algorithm
implicit in Theorem 13. An important issue that remains is to
We now give a novel simpler decomposition of single-select-
choose the level at which to cease the recursion and handle end
bit multiplexors whose two cofactors are generic operators. As
cases with special-purpose techniques.
will be shown later, it leads to a more natural recursion, with
Thus, let cj be the least number of CNOT gates needed
known optimizations in end cases [26], [28], [29], [35], [36].
to implement a j-qubit unitary operator using some known
Theorem 12—Demultiplexing a Multiplexor:
quantum-circuit-synthesis algorithm. Then, Theorem 13 im-
plies the following:

cj ≤ 4cj−1 + 3 × 2j−1 . (17)

One can now apply the decomposition of Theorem 13 recur-

Proof: Let U = U0 ⊕ U1 be the multiplexor of choice; we
sively, which corresponds to iterating the above inequality. If
formulate and solve an equation for the unitaries required to
-qubit operators may be implemented using ≤ c CNOT gates,
implement U in the manner indicated above. We want unitary
one can prove the following inequality for cn by induction:
V , W and unitary diagonal D satisfying U = (I ⊗ V )(D ⊕
D† )(I ⊗ W ). In other words
cn ≤ 4n− (c + 3 × 2−1 ) − 3 × 2n−1 . (18)





U1 V D W
= . (16) We have recorded in Table I the formula for cn with recursion
U2 V D† W
bottoms out at one-qubit operators (l = 1 and cl = 0), or two-
qubit operators (l = 2 and cl = 3, as in [28], [29], [35], and
Multiplying the expressions for U1 and U2 , we cancel out
[36]). In either case, we improve on the best previously pub-
the W -related terms and obtain U1 U2† = V D2 V † . Using this
lished algorithm (cf., [22]). However, to obtain our advertised
equation, one can recover D and V from U1 U2† by a standard CNOT count of (23/48) × 4n − (3/2) × 2n + 4/3, we shall
computational primitive called diagonalization. Further, W = need two further optimizations. Due to their more technical
DV † U2 . We are left with the fact that for D diagonal, the matrix nature, they are discussed in the Appendix.
D ⊕ D† is in fact a multiplexed Rz gate acting on the most Note that for n = 3, only 20 CNOTs are needed. This is the
significant bit in the circuit.  best known three-qubit circuit at present (cf., [34]). Thus, our
Using the new decomposition, we now demultiplex the two algorithm is the first efficient n-qubit circuit-synthesis routine,
side multiplexors in the CSD (Theorem 10). This leads to which also produces a best practice circuit in a small number
the following decomposition of generic operators that can be of qubits.
applied recursively.
Theorem 13—QSD:
VI. N EAREST N EIGHBOR C IRCUITS
A frequent criticism of quantum-logic synthesis (especially
highly optimized circuits, which nonetheless must conform to
large theoretical lower bounds on the number of gates) is that
the resulting circuits are physically impractical. In particular,
Hence, an arbitrary n-qubit operator can be implemented by naïve gate counts ignore many important physical problems
a circuit containing three multiplexed rotations and four generic that arise in practice. Many such are grouped under the topic of
(n − 1)-qubit operators, which can be viewed as cofactors of quantum architectures [5], [24], including questions of: 1) how
the original operator. best to arrange the qubits and 2) how to adapt a circuit diagram
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1008 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 25, NO. 6, 2006

TABLE I
COMPARISON OF CNOT COUNTS FOR UNITARY CIRCUITS GENERATED BY SEVERAL ALGORITHMS (BEST RESULTS ARE IN BOLD). WE HAVE LABELED
THE A LGORITHMS BY THE M ATRIX D ECOMPOSITION T HEY I MPLEMENT . T HE R ESULTS OF T HIS P APER ARE B OLDFACED , AND C OMPRISE T HREE
ALGORITHMS BASED ON THE QSD. OTHER ROWS REPRESENT PREVIOUSLY PUBLISHED ALGORITHMS. GATE COUNTS ARE NOT GIVEN FOR
ALGORITHMS WHOSE PERFORMANCE IS NOT (GENERICALLY) ASYMPTOTICALLY OPTIMAL

to a particular physical layout. A spin chain7 is perhaps the most A PPENDIX

restrictive architecture: The qubits are laid out in a line, and A DDITIONAL C IRCUIT O PTIMIZATIONS
all CNOT gates must act only on adjacent (nearest neighbor)
Section V shows that recursively applying the QSD until
qubits. As spin chains embed into two- and three-dimensional
only -qubit operators remain produces circuits with at most
grids, we view them as the most difficult architecture from the
4n− (c + 3 × 2−1 ) − 3 × 2n−1 CNOT gates.
perspective of layout. The study in [15] shows how to adapt
To obtain our advertised CNOT count, we apply additional
Shor’s algorithm to spin chains without asymptotic increase in
optimizations below, which reduce (4n− − 1)/3 CNOTs in
gate counts. However, it is not yet clear if generic circuits can
general, and an additional 4n−2 − 1 in the case = 2, c = 3.
be adapted similarly.
This results in the following final CNOT count:
As shown next, our circuits adapt well to the spin-chain limi-
tations. Most CNOT gates used in our decomposition already


23 3 4
act on nearest neighbors, e.g., those gates implementing the cn ≤ ×4 −n
× 2n + . (19)
48 2 3
two-qubit operators. Moreover, Fig. 2 shows that only 2n−k
CNOT gates of length k (where the length of a local CNOT Observe that the leading term is slightly below 4n /2, whereas
is 1) will appear in the circuit implementing a multiplexed the leading term in the lower bound from [28] and [29] is 4n /4.
rotation with (n − 1) control bits. Fig. 3 decomposes a length- Thus, our result cannot be improved by more than a factor of 2.
k CNOT into 4k − 4 length-1 CNOTs. Summation shows that
9 × 2n−1 − 8 nearest neighbor CNOTs suffice to implement
the multiplexed rotation. Therefore, restricting CNOT gates to A. Implementing Multiplexed Ry With Controlled Z
nearest neighbor interactions increases CNOT count by at most
Recall the two-qubit controlled Z gate, given by the follow-
a factor of 9.
ing matrix:
 
VII. C ONCLUSION AND F UTURE W ORK 1
 1 
Our approach to quantum-circuit synthesis emphasizes sim- Controlled Z =  . (20)
1
plicity, a well-pronounced top-down structure, and practical −1
computation via the CSD. By introducing the QMUX and
optimizing its singly controlled version, we derived a quantum The controlled Z gate is commonly denoted by a “•” on each
analog of the well-known Shannon decomposition of Boolean qubit, connected by a vertical line, as shown in the diagram
functions. Applying this decomposition recursively to quantum below. This gate can be implemented using a single CNOT with
operators leads to a circuit-synthesis algorithm in terms of the desired orientation, and one-qubit gates (whose physical
QMUXs. As seen in Table I, our techniques achieve the best realizations are typically simpler).
known CNOT counts, both for small numbers of qubits and
asymptotically. Our approach has the additional advantage that
it coopts all results on small numbers of qubits—e.g., future
specialty techniques developed for three-qubit quantum-logic
synthesis can be used as terminal cases of our recursion.
We have also discussed various problems specific to quantum The statements and proofs of Theorem 8 and Fig. 3 still
computation, specifically initialization of quantum registers and hold for multiplexed Ry gates if all CNOTs are replaced with
mapping to the nearest neighbor gate library. controlled Z gates. Thus, the central multiplexed Ry in the
CSD may be implemented with 2n controlled Z gates, of which
7 The term arises since the qubit is also commonly thought of as an abstract one is initial (or terminal). As the initial controlled Z gate
particle with quantum spin 1/2. is diagonal, it may be absorbed into the neighboring generic
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SHENDE et al.: SYNTHESIS OF QUANTUM-LOGIC CIRCUITS 1009

multiplexor. This saves one gate at each step of the recursion, [7] S. S. Bullock and I. L. Markov, “An elementary two-qubit quantum
for the total savings of (4n− − 1)/3 CNOT gates. computation in twenty-three elementary gates,” in Proc. 40th ACM/IEEE
Design Automation Conf., Anaheim, CA, Jun. 2003, pp. 324–329.
[8] ——, “An elementary two-qubit quantum computation in twenty-three
B. Extracting Diagonals to Improve Decomposition elementary gates,” Phys. Rev. A, At. Mol. Opt. Phy., vol. 68, p. 012318,
2003.
of Two-Qubit Operators [9] ——, “Smaller circuits for arbitrary n-qubit diagonal computations,”
Quantum Inf. Comput., vol. 4, no. 1, pp. 27–47, 2004.
Terminate the recursion when only two-qubit operators re- [10] G. Cybenko, “Reducing quantum computations to elementary unitary
main; there will be 4n−2 of them. These two-qubit operators operations,” Comput. Sci. Eng., vol. 3, no. 2, pp. 27–32, Mar./Apr. 2001.
all act on the least significant qubits and are separated by the [11] D. Deutsch, “Quantum computational networks,” Proc. R. Soc. Lond. A,
Math. Phys. Sci., vol. 425, no. 1868, pp. 73–90, 1989.
controls of multiplexed rotations. To perform better optimiza- [12] D. Deutsch, A. Barenco, and A. Ekert, “Universality in quantum com-
tion, we recite a known result on the decomposition of two- putation,” Proc. R. Soc. Lond. A, Math. Phys. Sci., vol. 449, no. 1937,
qubit operators. pp. 669–677, 1995.
[13] D. P. DiVincenzo, “Two-bit gates are universal for quantum computation,”
Theorem 14—Decomposition of a Two-Qubit Operator Phys. Rev. A, At. Mol. Opt. Phy., vol. 51, no. 2, pp. 1015–1022, Feb. 1995.
[28], [29]: [14] R. P. Feynman, “Quantum mechanical computers,” Found. Phys., vol. 16,
no. 6, pp. 507–531, 1986.
[15] A. G. Fowler, S. J. Devitt, and L. C. L. Hollenberg, “Implementation of
Shor’s algorithm on a linear nearest neighbour qubit array,” Quantum Inf.
Comput., vol. 4, no. 4, p. 237, 2004.
[16] G. H. Golub and C. van Loan, Matrix Computations. Baltimore, MD:
The Johns Hopkins Univ. Press, 1989.
[17] L. K. Grover, “Quantum mechanics helps with searching for a needle in a
We use Theorem 14 to decompose the rightmost two-qubit haystack,” Phys. Rev. Lett., vol. 79, no. 2, pp. 325–328, Jul. 1997.
operator, migrate the diagonal through the select bits of the [18] W. N. N. Hung, X. Song, G. Yang, J. Yang, and M. Perkowski, “Quantum
multiplexor to the left, and join it with the two-qubit operator on logic synthesis by symbolic reachability analysis,” in Proc. 41st Design
Automation Conf., San Diego, CA, Jun. 2004, pp. 838–841.
the other side. Now, we decompose this operator, and continue [19] K. Iwama, Y. Kambayashi, and S. Yamashita, “Transformation rules for
the process. Since we save one CNOT in the implementation of designing CNOT-based quantum circuits,” in Proc. 39th Design Automa-
every two-qubit gate but the last, we improve the l = 2, cl = 3 tion Conf., New Orleans, LA, 2002, pp. 419–424.
[20] R. Jozsa and N. Linden, “On the Role of Entanglement in Quantum-
count by 4n−2 − 1 gates. Computational Speed-Up,” Proc. R. Soc. A, vol. 459, no. 2036, pp. 2011–
2032, 2003.
ACKNOWLEDGMENT [21] E. Knill, “Approximation by quantum circuits,” Los Alamos National
Laboratory, Los Alamos, NM, LANL Rep. LAUR-95-2225, 1995.
The authors are grateful to Prof. D. O’Leary from the Uni- [22] M. Möttönen, J. J. Vartiainen, V. Bergholm, and M. M. Salomaa, “Quan-
tum circuits for general multiqubit gates,” Phys. Rev. Lett., vol. 93, no. 13,
versity of Maryland and Prof. J. Shinnerl from the University of p. 130502, Sep. 2004.
California, Los Angeles (UCLA), for their help with computing [23] M. A. Nielsen and I. L. Chuang, Quantum Computation and Quantum
the CSD in Matlab; to G. Brennen at National Institute of Stan- Information. Cambridge, U.K.: Cambridge Univ. Press, 2000.
[24] M. Oskin, F. T. Chong, I. Chuang, and J. Kubiatowicz, “Building quantum
dards and Technology (NIST) and J. Zhang at UC Berkeley for wires: The long and the short of it,” in Proc. 30th Annu. ISCA, San Diego,
their helpful comments, and the authors of quant-ph/0406003, CA, Jun. 2003, pp. 374–385.
whose package Qcircuit.tex produced almost all the figures. [25] C. C. Paige and M. Wei, “History and generality of the CS decomposi-
tion,” Linear Algebra Appl., vol. 208, pp. 303–326, 1994.
The views and conclusions contained herein are those of the [26] V. V. Shende, S. S. Bullock, and I. L. Markov, “Recognizing small-circuit
authors and should not be interpreted as necessarily represent- structure in two-qubit operators,” Phys. Rev. A, At. Mol. Opt. Phy., vol. 70,
ing official policies or endorsements of employers and funding no. 1, p. 012310, 2004.
[27] V. V. Shende and I. L. Markov, “Quantum circuits for incompletely speci-
agencies. Certain commercial equipment or instruments may fied two-qubit operators,” Quantum Inf. Comput., vol. 5, no. 1, pp. 49–58,
be identified in this paper to specify experimental procedures. 2005.
Such identification is not intended to imply recommendation or [28] V. V. Shende, I. L. Markov, and S. S. Bullock, “Smaller two-qubit circuits
for quantum communication and computation,” in Proc. Design, Automa-
endorsement by the NIST. tion, and Test Eur., Paris, France, Feb. 2004, pp. 980–985.
[29] ——, “Minimal universal two-qubit controlled-not based circuits,” Phys.
R EFERENCES Rev. A, At. Mol. Opt. Phy., vol. 69, pp. 062321–062329, 2004.
[30] V. V. Shende, A. K. Prasad, I. L. Markov, and J. P. Hayes, “Synthesis
[1] The ARDA Roadmap for Quantum Information Science and Technology. of reversible logic circuits,” IEEE Trans. Comput.-Aided Des. Integr.
[Online]. Available: http://qist.lanl.gov/qcomp\_map.shtml Circuits Syst., vol. 22, no. 6, pp. 710–722, Jun. 2003.
[2] A. Aho and K. Svore, “The design and optimization of quantum circuits [31] P. Shor, “Polynomial-time algorithms for prime factorization and discrete
using the Palindrome Transform,” in Proc. ERATO Conf. Quantum Inf. logarithm on a quantum computer,” SIAM J. Comput., vol. 26, no. 5,
Sci., Kyoto, Japan, Sept. 5-7, 2003. LANL ArXiv: quant-ph/0311008. pp. 1484–1509, Oct. 1997.
[Online]. Available: http://www1.cs.columbia.edu~kmsvore/research.htm [32] R. R. Tucci, A Rudimentary Quantum Compiler. [Online]. Available:
[3] A. Barenco, C. Bennett, R. Cleve, D. P. DiVincenzo, N. Margolus, http://www.arxiv.org/abs/quant-ph/9805015
P. Shor, T. Sleator, J. A. Smolin, and H. Weinfurter, “Elementary gates for [33] J. J. Vartiainen, M. Möttönen, and M. M. Salomaa, “Efficient decompo-
quantum computation,” Phys. Rev. A, At. Mol. Opt. Phy., vol. 52, no. 5, sition of quantum gates,” Phys. Rev. Lett., vol. 92, no. 17, p. 177902,
pp. 3457–3467, Nov. 1995. Apr. 2004.
[4] C. H. Bennett and G. Brassard, “Quantum cryptography: Public-key dis- [34] F. Vatan and C. Williams, Realization of a General Three-Qubit
tribution and coin tossing,” in Proc. IEEE Int. Conf. Computers, Systems, Quantum Gate. [Online]. Available: http://www.arxiv.org/abs/quant-ph/
and Signal Processing, Bangalore, India, 1984, pp. 175–179. 0401178
[5] G. K. Brennen, D. Song, and C. J. Williams, “Quantum-computer archi- [35] ——, “Optimal quantum circuits for general two-qubit gates,” Phys. Rev.
tecture using nonlocal interactions,” Phys. Rev. A, At. Mol. Opt. Phy. (R), A, At. Mol. Opt. Phy., vol. 69, no. 3, p. 032315, 2004.
vol. 67, no. 5, p. 050302, May 2003. [36] G. Vidal and C. M. Dawson, “A universal quantum circuit for two-qubit
[6] S. S. Bullock, “Note on the Khaneja Glaser decomposition,” Quantum Inf. transformations with three CNOT gates,” Phys. Rev. A, At. Mol. Opt. Phy.,
Comput., vol. 4, no. 5, pp. 396–400, Mar. 2004. vol. 69, no. 1, p. 010301, Jan. 2004.
Authorized licensed use limited to: University of Pisa. Downloaded on June 24,2024 at 17:47:45 UTC from IEEE Xplore. Restrictions apply.
1010 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 25, NO. 6, 2006

[37] J. Zhang, J. Vala, S. Sastry, and K. B. Whaley, “Exact two-qubit universal Igor L. Markov (M’97–SM’05) received the M.A.
quantum circuit,” Phys. Rev. Lett., vol. 91, no. 2, p. 027903, Jul. 2003. degree in mathematics and the Ph.D. degree in com-
[38] V. V. Zhirnov, R. K. Cavin, J. A. Hutchby, and G. I. Bourianoff, “Limits puter science, both from the University of California,
to binary logic switch scaling—A gedanken model,” Proc. IEEE, vol. 91, Los Angeles, in 1994 and 2001, respectively.
no. 11, pp. 1934–1939, Nov. 2003. He is currently an Associate Professor at the De-
partment of Electrical Engineering and Computer
Science at the University of Michigan, Ann Arbor.
Vivek V. Shende received the B.S. degree in mathe- He has published more than 100 refereed papers
matics from the University of Michigan, Ann Arbor, in journals, magazines, and conference proceed-
in 2006. ings. His interests include combinatorial optimiza-
He is presently on an extended visit to University tion with applications to the design and verification
of California, Berkeley, where he is working with the of integrated circuits, as well as quantum logic circuits.
quantum computing group. His work on the design He is a member of the Association for Computing Machinery (ACM) and
of (classical) reversible and quantum logic circuits the American Mathematical Society (AMS). He has served on the technical
has appeared in Quantum Computation and Informa- program committees at the Design Automation Conference (DAC), Interna-
tion, Physical Review A, and IEEE TRANSACTIONS tional Conference on Computer-Aided Design, Design Automation and Test in
ON C OMPUTER -A IDED D ESIGN OF I NTEGRATED Europe Conference, International Symposium on Physical Design, and several
CIRCUITS AND SYSTEMS. His present research in- other IEEE conferences and symposia. He served as the General Chair and the
terests include the design of quantum circuits, and the estimation and correction Technical Program Committee Chair of the International Workshop on System-
of error in quantum systems. Level Interconnect Prediction. Currently, he is a Guest Editor of Integration:
Mr. Shende is a recipient of the 2004 IEEE Circuits and Systems Society The VLSI Journal, an Editor of the ACM Special Interest Group on Design
(CAS) Donald O. Pedersen award. Automation (SIGDA) e-newsletter, and a Member of the advisory board of
ACM SIGDA.
In 2001, Dr. Markov was awarded the DAC Fellowship and received the IBM
University Partnership Award. He is also a recipient of the 2004 IEEE Circuits
Stephen S. Bullock received the Ph.D. degree in and Systems Society (CAS) Donald O. Pederson paper-of-the-year award and
mathematics from Cornell University, Ithaca, NY, in the 2004 ACM SIGDA Outstanding New Faculty Award. He won the best paper
May 2000. award at DATE 2005 in the Circuit Test category, the U.S. National Science
He has spent three years as a Term-Assistant Foundation Career Award, the Synplicity Inc. Faculty Award, and the Technical
Professor in the Mathematics Department of the Leadership Award from the ACM SIGDA.
University of Michigan and two years working as
a National Research Council Postdoctoral Associate
of the Mathematical and Computational Sciences
Division of the National Institute of Standards and
Technology. Since August 2006, he has been a Staff
Researcher for the Institute for Defense Analyses
Center for Computing Sciences, Bowie, MD. His efforts at Michigan cen-
tered on differential geometry, while his current research concerns studies of
multipartite entanglement and applying matrix factorization techniques to the
design of quantum logic circuits. His work on these areas have been published
in the New York Journal of Mathematics, the Electronic Journal of Numerical
Analysis, Physical Review A and Physical Review Letters, the Journal of Math-
ematical Physics, and the Proceedings of the Design Automation Conference.

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