Computer Architecture

Aamna Tariq
[email protected]
The Von Neumann Architecture

Von Neumann
Architecture
Designing Computers
• All computers more or less based on the same
basic design, the!
 The Von Neumann Architecture
Model for designing and building computers, based
on the following three characteristics:
1) The computer consists of four main sub-systems:
• Memory
• ALU (Arithmetic/Logic Unit)
• Control Unit
• Input/Output System (I/O)
2) Program is stored in memory during execution.
3) Program instructions are executed sequentially.
 The Von Neumann Architecture
Bus

Processor (CPU)

Memory Input-Output
Control Unit

ALU
Communicate with
Store data and program
"outside world", e.g.
• Screen
Execute program
• Keyboard
Do arithmetic/logic operations • Storage devices
requested by program • ...
Memory Subsystem
• Memory
• Consists of many memory cells (storage units) of a fixed size.
Each cell has an address associated with it: 0, 1, …
• All accesses to memory are to a specified address.
• When the computer is running, both
• Program
• Data (variables)
are stored in the memory.
Operations on Memory
• Fetch (address):
• Fetch a copy of the content of memory cell with the specified
address.
• Store (address, value):
• Store the specified value into the memory cell specified by address.
• Overwrites the previous value of the memory cell.
• The memory system is interfaced via:
• Memory Address Register (MAR)
• Memory Data Register (MDR)
• Fetch/Store signal
Structure of the Memory Subsystem
• Fetch(address)
MAR MDR
• Load address into MAR.
F/S • Copy the content of memory cell with
Memory
Fetch/Store
specified address into MDR.
decoder
circuit
controller • Store(address, value)
• Load the address into MAR.
• Load the value into MDR.
• Decode the address in MAR
... • Copy the content of MDR into memory
cell with the specified address.
Input/Output Subsystem
• Handles devices that allow the computer system to:
• Communicate and interact with the outside world
• Screen, keyboard, printer, ...
• Store information (mass-storage)
• Hard-drives, floppies, CD, tapes, …
• Mass-Storage Device Access Methods:
• Direct Access Storage Devices (DASDs)
• Hard-drives, floppy-disks, CD-ROMs, ...
• Sequential Access Storage Devices (SASDs)
• Tapes (for example, used as backup devices)
The ALU Subsystem
• The ALU (Arithmetic/Logic Unit) performs
• mathematical operations (+, -, x, /, …)
• logic operations (=, <, >, and, or, not, ...)
• In today's computers integrated into the CPU
• Consists of:
• Circuits to do the arithmetic/logic operations.
• Registers (fast storage units) to store intermediate
computational results.
 Structure of the ALU
• Registers:
R0
• Very fast local memory cells, that store
R1
operands of operations and intermediate
results. R2

• ALU circuitry:
• Contains an array of circuits to do Rn
mathematical/logic operations.
• Bus:
ALU circuitry
• Data path interconnecting the registers to
the ALU circuitry.
The Control Unit
• Program is stored in memory
• as machine language instructions, in binary
• The task of the control unit is to execute programs by
repeatedly:
• Fetch from memory the next instruction to be executed.
• Decode it, that is, determine what is to be done.
• Execute it by issuing the appropriate signals to the ALU,
memory, and I/O subsystems.
• Continues until the HALT instruction
Structure of the Control Unit
• PC (Program Counter):
• stores the address of next instruction to fetch
• IR (Instruction Register):
• stores the instruction fetched from memory
• Instruction Decoder:
• Decodes instruction and activates necessary circuitry

PC IR

+1
Instruction
Decoder
How does this all work together?
• Program Execution:
• PC is set to the address where the first program
instruction is stored in memory.
• Repeat until HALT instruction or fatal error
Fetch instruction
Decode instruction
Execute instruction
End of loop
von Neumann
Architecture
Failures of Von Neumann
• Both data and programs share the same memory space.
• Every piece of data and instruction has to pass across the
data bus in order to move from main memory into the CPU
(and back again).
• This is a problem because the data bus is a lot slower than the rate
at which the CPU can carry out instructions.
• This is called the 'Von Neumann bottleneck'.
• A special kind of memory called a 'Cache' (pronounced 'cash') is
used to tackle with this problem
• The rate at which data needs to be fetched and the rate at
which instructions need to be fetched are often very
different. And yet they share the same bottlenecked data
bus.
• To solve the problem idea of the Harvard Architecture is
considered that to split the memory into two parts.
• One part for data and another part for programs. Each part is
accessed with a different bus.
• This means the CPU can be fetching both data and instructions at
the same time.