12 Acta Electrotechnica et Informatica, Vol. 10, No.

1, 2010, 12–17

ZVZCS PWM DC-DC CONVERTER WITH CONTROLLED OUTPUT RECTIFIER

Jaroslav DUDRIK, Vladimír RUŠČIN

Department of Electrical, Mechatronic and Industrial Engineering, Faculty of Electrical Engineering and Informatics,
Technical University of Košice, Letná 9, 042 00 Košice, Slovak Republic, tel.: +421 55 602 2276,
e-mail: [email protected], [email protected]

ABSTRACT
A new zero-voltage zero-current switching (ZVZCS) full-bridge phase-shifted PWM converter with controlled output rectifier is
presented in this paper. Zero-voltage turn-on and zero-current turn-off for all power switches of the inverter is achieved for full load
range from no-load to short circuit by using new secondary energy recovery clamp and modified PWM control strategy. Moreover by
adding secondary energy recovery clamp the zero-current turn-on and zero-voltage turn-off for rectifier switch is ensured. The
principle of operation is explained and analysed and simulation results are presented.

Keywords: soft switching, ZVZCS converter, switched-mode power supply

1. INTRODUCTION T1 C1
D1 D3 T3

The soft switching PWM converters are very suitable uP

iP
for high voltage, high power applications where IGBTs
U
are predominantly used as power switches. TR
D4 C4 D2 T2
The conventional phase shifted PWM converters are T4
often used in many applications because their topology D5 D6
permits all switching devices to operate under zero-
voltage switching by using circuit parasitics such as power LO IO
transformer leakage inductance and devices junction CO UO
CS +
capacitance.
However, because of phase-shifted PWM control, the
Snubber
converter has a disadvantage that circulating current flows
Fig. 1 Principle of the ZVZCS converter operation
through the power transformer and switching devices
during freewheeling intervals.
The circulating current is a sum of the reflected output
T1
current and transformer primary magnetizing current. Due
to circulating current, RMS current stresses of the T=const.
t
T2
transformer and switching devices are still high compared
with those of the conventional hard-switching PWM full- t
T3 φ1=var.
bridge converter. To achieve soft switching and decrease
T4 td t
the circulating current, various snubbers, auxiliary circuits
and/or clamps connected mostly at the secondary side of
t
power transformer are applied [1] – [18]. uP U
The first way of decreasing the circulating current is t
U
achieved by application of the reverse bias for the output
rectifier when the secondary voltage of the transformer in iP
Magnetizing current

the freewheeling interval becomes zero. The output

t
rectifier (D5, D6) is then reverse biased and the secondary
windings of the transformer are opened (Fig. 1).
Consequently, both primary and secondary currents of Fig. 2 Operation waveforms of ZVZCS PWM converter
the transformer become zero. Only a low magnetising
current circulates during freewheeling interval as shown in
Fig. 2. Thus, the RMS current of the transformer and The another method how to reduce the circulating
switches are considerably reduced in the freewheeling current in the converter is using the controlled output
interval. rectifier (Fig. 3) [12], [13]. Turn-off losses are reduced by
Hence, the converter achieves nearly zero-current non dissipative turn-off snubbers (capacitors C1 – C4).
switching for the right leg (transistors T2, T3) due to Reduction of turn-on losses is achieved by using the
minimised circulating current during the interval of right leakage inductance of power transformer.
leg transition and achieves zero-voltage switching for the In the converters mentioned above, the inverter
left leg (transistors T1, T4) due to reflected output current switches operate under zero-voltage switching either in
(IO/n=IP, n=NP/NS) during the interval of left leg one leg (converter in Fig. 1) or in both legs of the
transition. converter (converter in Fig. 3).

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Acta Electrotechnica et Informatica, Vol. 10, No. 1, 2010 13

However, the optimal switching for IGBTs is zero- The semiconductor switch TS in the secondary side is
voltage turn-on and mainly zero-current turn-off due to used to reset secondary and consequently also primary
elimination of the current tail influence, which has current. The transistor TS operates with double switching
considerably high involvement in creation of the IGBT frequency. At turn-off of the switch TS the energy stored
turn-off losses. in leakage inductance is clamped by DC and CC and then
transferred through DS and LS to the load. By using non-
dissipative turn-off snubber to reduce turn-off losses of
T1 D1 C1 C2 D3 T3
the transistor TS, the overall efficiency is increased.
uP The additional energy recovery clamp is very simple,
iP
consisting of only few components and so the additional
U TR cost is not high.
T4 D4 C4 C3 D2 T2

3. OPERATION PRINCIPLE

T5 The basic operation of the proposed soft switching

LO IO converter has nine operating modes (intervals) within each
T6
CO UO half cycle. The switching diagram and operation
Controlled
rectifier waveforms are shown in Fig. 6.
It is assumed that all components and devices are
ideal.
Fig. 3 Principle of the ZVS converter operation The turn-off snubber used for decreasing turn-off
losses of the secondary switch was not included into
circuit analysis.
Interval (t0-t1): The transistors T1, T2 and TS are turned
1 2
3 4 3 4 1 2 3 4 on at t0. The primary current (only magnetizing current)
0 t dv
T/2
flows through diodes D1, D2 and consequently the
5
transistors T1 and T2 are turned on with ZVS.
6 6 5 6 The collector current of the transistor TS starts to flow
0 t dz
in the loop TS-CC-DS-LS-LO-CO and capacitor CC is
1=var
discharged. So, the rise of the collector current is in
U resonant way with the resonant frequency ωR1 different at
no-load and short circuit in a range:
0
U

CO ⋅ CC
( LO + LCS ) ⋅ ≤ ω R1 ≤ ( LO + LCS ) ⋅ C C (1)
CO + CC
0

Interval (t1-t2): The transformer leakage inductance

LLP reflected to the primary side causes that primary
Fig. 4 Operation waveforms of ZVS PWM converter current iP is linearly increased with the slope U/LLP while
the secondary voltage uS is zero as a result of
commutation between output freewheeling diode DO and
rectifier diode D5.
2. POWER CIRCUITS OF THE PROPOSED
The discharging of the clamp capacitor CC causes the
CONVERTER
current overshoot at turn-on of the transistor TS, which
To avoid the problems mentioned above, the topology maximum is limited by the value of the smoothing
of the following ZVZCS converter was proposed. inductance current iLO.
The proposed DC-DC converter shown in Fig. 5 Interval (t2-t3): At t2 the commutation between diode
consists of high-frequency inverter, power transformer, D5 and output freewheeling diode DO is finished. At t3 the
output rectifier, output secondary switch and output filter. clamp capacitor current commutates to clamp diode DC.
The main part of the converter includes high frequency Interval (t3-t4): Transistors T1 and T2 are conducting
full-bridge inverter consisting of four ultrafast IGBT´s T1- and the energy is delivered from the source to the load via
T4 and freewheeling diodes D1-D4. The secondary winding power transformer TR, diode D5 and smoothing choke LO
of the high-frequency step-down power transformer TR is and from inductance LS in the loop LS-LO-CO-DC-DS. So,
connected through a fast recovery rectifier D5, D6 and the smoothing inductance current is a sum of the
secondary switch TS to output filter consisting of secondary current and inductance LS current:
smoothing choke LO and capacitor CO.
The converter is controlled by modified pulse-width iO = i S + i LS (2)
modulation (Fig. 6), and consequently the zero-voltage
turn-on and zero-current turn-off all of the transistors T1- Interval (t4-t5): The primary current increases with the
T4 in the inverter are reached. slope:

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14 ZVZCS PWM DC-DC Converter with Controlled Output Rectifier

di p U − n ⋅U O U where LLS is the transformer leakage inductance reflected

= + (3) to the secondary side and UCC is maximum clamp
dt LLP + n ⋅ LO Lm
2
capacitor voltage.
Then
NP
Where n = is power transformer turns ratio and Lm NS
NS ΔU S = U CC − U (7)
NP
magnetizing inductance of the power transformer TR.
Interval (t5-t6): At t5 the secondary transistor TS turns
Interval (t6-t7): Only small magnetizing current im
off. At that time the commutation between transistor TS
flows through primary winding of TR. The output current
and clamp diode DC occurs and charging of the clamp
flows trough output freewheeling diode DO.
capacitor CC starts. This commutation time can be
Interval (t7-t8): In this interval the transistors T1 and T2
neglected, because only parasitic inductance of wires is in
are turned off with ZCS. Only small magnetizing current
the commutation loop TS-DC-CC. Afterwards the
im is switched off by transistors T1 and T2. The
commutation between DC, D5 and output freewheeling
magnetizing current charges or discharges the internal
diode DO starts. Because in the commutation path a
output capacitances COSS1 – COSS4 of the IGBT transistors
relatively large leakage inductance of the transformer is
T1 – T4 respectively.
found, the commutation is slow.
The minimum dead time td for the transistors in the leg
In the mentioned commutation path the resonance
is given by:
occurs and rise of the current depends on the resonant
frequency ωR2: t d ,min ≥ t recom (8)

CO ⋅ CC where trecom is minority carrier recombination time of

ω R 2 = ( LO + L LS ) ⋅ for RO = ∞ (4)
CO + CC IGBTs due to stored charges that could not be removed at
turn-off process.
When we take into account also charging and
ω R 2 = ( LO + LLS ) ⋅ C C for RO = 0 (5) discharging of the capacitances COSS1 – COSS4 by
magnetizing current, then minimum dead td for achieving
During the commutation the energy stored in the of zero voltage turn-on must be:
leakage inductance is transferred to the clamp capacitor
CC and consequently an over-voltage ΔUS appears on 4C OSS ⋅ U
transformer secondary voltage. t d ,min ≥ (9)
I m,max
Its value can be calculated from equation (the output
current ripple is neglected): So, in the end of the interval the situation from first
interval is repeated for the transistors T3 and T4, which
1 1 turn-on at zero-voltage during conduction of the
L LS ⋅ I O2 = C C ⋅ U CC
2
(6)
2 2 freewheeling diodes D3, D4 (at t9).

T1 D 1 D 3 T 3

uP
iP
U TR

D 5 D 6
T4 D 4 D 2 T 2

L O

C O
LS R O
D O

D S D C

T u rn -o ff
C T S
C snubber

Fig. 5 Scheme of the proposed ZVZCS PWM DC-DC converter

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Acta Electrotechnica et Informatica, Vol. 10, No. 1, 2010 15

344V
1 2
T 1, T 2 td T 3, T 4 T 1, T 2 16.0A
300V
TS TS TS

uP U 12.0A

200V
C O S S 1 -C O S S 4
iP
8.0A

T 1, T 2
100V
uS ΔUS
D 3 ,D 4 4.0A

U .N S /N P
0V
0A

iD O >>
iD 5 iD O iD 6 iD 0 iD 5 -72V -2.6A
iD 169.0us 170.0us
1 V(P1) 2
172.0us
IC(Z4)- I(D4)
174.0us 176.0us 178.0us 180.0us

Time

iTS Fig. 7 Switch (transistor T4 + diode D4) voltage uCE4 and switch
current iC4+iD4

iD C 400V 20A
1 2

iC C 200V 10A

0V 0A
t0t1t2t3 t4 t5t6 t7t8t9

Fig. 6 Operation waveforms of the converter >>

-200V -10A
1 V(P1) 2 IC(Z4)- I(D4)
383V 19A
1 2

Interval (t8-t9): At t8 the freewheeling diodes D3, D4 200V 10A

starts to lead primary current and thus conditions for the
zero-voltage turn-on for the transistors T3 and T4 are set 0V 0A

up.
-200V -10A
SEL>>

170.0us 172.0us 174.0us 176.0us 178.0us 180.0us 182.0us 184.0us 186.0us

4. SIMULATION RESULTS 1 V(P1)- V(P2) 2 I(L1a)
Time

A simulation model in programme Orcad was created

to verify the properties of the proposed converter. The Fig. 8 Switch voltage uCE4 and switch current iC4+iD4.(upper
waveforms), Power transformer TR primary voltage up and
simulations were made at input voltage U = 320V.
primary current iP, (bottom waveforms)
Parameters:
Fig. 8 shows primary voltage uP and current iP of the
Transformer TR parameters: power transformer TR at output load current above I0 =
Turns ratio n = 6.5, 100A (bottom waveforms) in comparison with switch
Magnetizing inductance Lm = 800 μH, voltage uCE4 and switch current iC4 of the transistor T4
Leakage inductance LLP = 5 μH. (upper waveforms). It is evident that no circulating current
Clamp circuit parameters: flows through primary winding of the power transformer.
Clamp capacitor CC = 220 nF, After turn-off of the transistor T4 only a small
Clamp inductance LS = 1 μH. magnetizing current is conducting through primary
winding of the power transformer. Maximum magnetizing
The following waveforms were obtained at resistive current Im,max is approximately 1 Amp. Depending on the
load. dead time td it should be high enough for charging or
Fig. 7 shows switch voltage uCE4 and switch current discharging output capacitances COSS1 – COSS4 of the
iC4+iD4 during turn-on and turn-off of the transistor T4 in IGBT switches and thus to achieve zero-voltage turn-on.
the converter. The switch (transistor T4 including diode Collector voltage uDS and collector current iD of the
D4) is turned-on under zero-voltage because at turn-on of secondary transistor TS (bottom waveforms) is shown in
the transistor T4 its freewheeling diode D4 is in on-state. Fig. 9. The secondary switch (transistor TS) is turned-on
Moreover the rate of rise of the collector current is limited under zero-current due to influence of the leakage
by the leakage inductance LLP of the transformer. inductance of the transformer LLS reflected to the
The transistor turn-off losses are negligible because secondary side and clamp inductance LS.
transistor T4 turns-off only small magnetizing current The turn-off loss is reduced by clamp capacitor CC
(about 1 Amp in this case) as can be seen in Fig. 7. acting as the non-dissipative snubber as it is evident in
Fig. 9.

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16 ZVZCS PWM DC-DC Converter with Controlled Output Rectifier

1 2
During commutation between secondary diode, output
300V 30A
freewheeling diode, and secondary switch the secondary
voltage and accordingly rectified secondary voltage is
200V 20A
zero. At turn-off of the secondary switch the secondary
100V 10A and also rectified voltage rises as a result of energy stored
in leakage inductance. The over-voltage can be decreased
0V
>> to acceptable value by proper design of the clamp
-4A
1 V(P1) 2 IC(Z4)- I(D4) capacitor and clamp inductance.
150
For completeness Fig. 11 shows also the clamp
capacitor current and clamp inductance current (bottom
100
waveforms).
50

SEL>>
5. CONCLUSION
-18
169us 170us 172us 174us 176us 178us 180us 182us
V(M1:d) I(Rcollector)
Time Soft switching and reduction of circulating currents in
Fig. 9 Switch voltage uCE4 and switch current iC4+iD4 (upper the proposed converter are achieved for full load range
waveforms) ,Collector voltage uDS and collector current iD of the using secondary side energy recovery clamp in
transistor TS, (bottom waveforms) combination with modified PWM.
By proper design it is possible to utilize the
The clamp diode current is displayed in Fig. 10 magnetizing current of power transformer for charging or
together with rectified secondary voltage. Sum of the discharging output capacitances of the IGBT switches and
collector current and clamp diode current equals the value thus zero-voltage turn-on of the IGBTs to achieve.
of the smoothing inductance current. If the magnetizing current is not high enough for
charging or discharging output capacitances of the IGBT
150 switches, during chosen dead time, then at least zero-
current turn-on is reached as a result of leakage inductance
100
of the power transformer.
The IGBT transistors are turned-off almost under zero
50
current. Only small magnetizing current of the power
0
transformer is turned-off by IGBT transistors.
V(M1:d) I(Rcollector) The main task of the proposed secondary energy
148
recovery clamp is transfer of the leakage inductance
100 energy to the load at turn-off of the secondary switch.
Moreover it ensures zero current turn-on and zero
50 voltage turn-off of the secondary switch.
Because this function of clamp is not fully effective
0
SEL>> when clamp inductance current is continuous, an
180.00us
I(Dc:A) V(UD)
181.00us 182.00us 183.00us 184.00us 185.00us 185.92us
additional turn-off snubber is employed to improve turn-
Time
off process of the secondary switch.
Fig. 10 Collector voltage uDS and collector current iD of the IGBTs in the full bridge inverter operate at almost
secondary transistor TS (upper waveforms) ideal switching conditions – ZV turn-on and ZC turn-off,
Rectified secondary voltage ud of the power transformer TR and which is the main advantage of the proposed converter.
clamp diode current iDC (bottom waveforms)
Soft switching of the secondary switch and leakage
energy transfer to the load is ensured by energy recovery
150
clamp containing only non-dissipative components.
100

50 ACKNOWLEDGMENTS

0 This work was supported by Slovak Research and

V(M1:d) I(Rcollector)
Development Agency under project APVV-0095-07 and
by Scientific Grant Agency of the Ministry of Education
100

50
of Slovak Republic under the contract VEGA No.
1/0099/09. The authors also wish to thank for the support
0 to the R&D operational program Centre of excellence of
SEL>>
power electronics systems and materials for their
-60
180.00us 181.00us 182.00us 183.00us 184.00us 185.00us 185.92us
components. The project is funded by European
I(Cc) I(Ls)
Time Community, ERDF – European regional development
Fig. 11 Collector voltage uDS and collector current iD of the fund.
secondary transistor TS (upper waveforms)
Clamp capacitor current iCC and snubber inductance current iLS
(bottom waveforms)

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Acta Electrotechnica et Informatica, Vol. 10, No. 1, 2010 17

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[8] HONNYONG CHA – LIHUA CHEN – RONGJUN

DING – QINGSONG TANG – FANG ZHENG BIOGRAPHIES
PENG: An Alternative Energy Recovery Clamp
Circuit for Full-Bridge PWM Converters With Wide Jaroslav Dudrik received the M.S. and Ph.D. degrees in
Ranges of Input Voltage, IEEE Transactions on electrical engineering from the Technical University of
Power Electronics, Volume 23, Issue 6, 2008, Košice, Slovakia, in 1976 and 1987, respectively. He is
pp. 2828 – 2837. currently full professor of Electrical Engineering at the
[9] XINKE WU – XIAOGAO XIE – JUNMING Department of Electrical, Mechatronic and Industrial
ZHANG – RONGXIANG ZHAO – ZHAOMING Engineering, Technical University of Košice, where he is
QIAN: Soft Switched Full Bridge DC-DC Converter engaged in teaching and research. His primary interest is
With Reduced Circulating Loss and Filter power electronics. His current field of research includes
Requirement, IEEE Transactions on Power dc-to-dc converters, high power soft switching converters,
Electronics, Volume 22, Issue 5, Sept. 2007, converters for renewable energy sources and automotive
pp. 1949 – 1955. technique.

[10] DUDRIK, J. – ŠPÁNIK, P. – TRIP, N. D.: Zero Vladimír Ruščin received the M. S. degree in electrical
Voltage and Zero Current Switching Full-Bridge engineering from the Technical University of Košice,
DC-DC Converter with Auxiliary Transformer, IEEE Slovakia, in 2006. In the same year, he joined the
Trans. on Power Electronics, Vol. 21, No. 5, 2006, Department of Electrical, Mechatronic and Industrial
pp. 1328 – 1335. Engineering, Technical University of Košice as a Ph.D.
[11] BOJOI, R. – GRIVA, G. – KOVACEVIC, G. – student. His primary interest is power electronics. His
TENCONI, A.: ZVS-ZCS full-bridge DC-DC field of research includes high frequency DC/DC
converter for voltage step-up in fuel cell distributed converters, microcontrollers, and soft switching technique
generation systems, in Record, European Conference in the power converters.

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