- FURU•o - - - - - - - - - - - - - - - - -
PRE-DRIVER/DRIVER/POWER AMP
During transmission, the VCO output is supplied to the pre-driver stage (08/09), where
the carrier signal is boosted up to approximately 0.2W. US is a 25W RF power amplifier
module, consisting of two amplifier stages. The power supply to the first stage is
controlled by the APC (automatic power control) circuit to limit the RF output to 25W.
While the last stage is directly supplied from mains input. The RF power amp module
has a voltage gain of approximately 50dB.
The RF power output is introduced to 170MHz lowpass filter network (L8-10/C64-69),
and then sent out to a 50-ohm antenna through coaxial cable.
TXSV SWITCHED 12V
MAINS 12V
TXSV
APC/PWR
TX -RE DUCT.
ON/OFF
U3
ANT
TO T
RX FRONTEND ___l
PRE- DRIVER RF POWER AMP
-~
(Automatic Power Control = APC)
To compensate for the RF output power variation due to frequency response of
VCO/driver stages and input voltage fluctuation, an automatic power control circuit is
incorporated. The output power stabilization is achieved by controlling the collector
voltages to the drivers 09 and q 1 (inside U3) automatically through a negative feedback
loop. (See the figure on the next page.)
A part of the RF output is rectified and smoothed by CR3/C62, and then reaches the
inverting input of the error amp ula (inside the APC module U6). While the non-in-
verting input of u la is biased by voltage divider resistors.
When the RF output is increased by some reason, u la output decreases, leading q 1 and
012 (bias controller) less conductive. Accordingly, the driver output is reduced to
maintain the final RF power constant.
To switch RF power high and low, and to prevent the RF power module from overload-
ing, the non-inverting input of ula error amp is biased in three ways.
1-8
---IP--~--11-------------------------------------
012
SWITCHED---_,;
12V
U6
R53 PWR Rl/LOW
(from CPU)
(Power HI/LO Switching)
q2 in U6 is switched on and off according to the PWR HI/LO control signal from the
CPU.
When high power is selected, q2 is switched off, disconnecting r12/R52 shunt out of the
voltage divider. Thus, ulaoutput becomes higher and ql/Q12 become more conductive,
introducing higher voltage to the driver stages. The preset pot R53 is used to adjust the
RF output to 25W.
On the contrary, when low power is selected, q2 is switched on to connect the shunt
resistors r12/R52 into the voltage divider network to reduce voltage to the non-inverting
input ofula. As the result, ql/Ql2 become less conductive to reduce supply voltage to
the RF driver stages. The preset pot R52 is used to adjust the RF output to lW.
As it is clear from the schematics, 25W adjustment (R53) must be done first and then
lW (R52).
(Thermal Shut-down Circuit)
To protect the RF power module from being overloaded due to antenna mismatching
(open or short), a thermal shut-down circuit is incorporated.
A posistor RTl, which shows positive temperature coefficient, is thermally coupled to
the heatsink of the RF power module U3. And it is electrically connected as a part of
the bias circuit for ulb op-amp.
Under normal operating temperature, the output of ulb is high enough to cut off crl,
and it does not give any effect to the error amp ula.
1-9
- - FUAU•o _ _ _ _ _ _ _ _ _ _ _ _ _ ___;....._ _ __
When the temperature of the RF power module exceeds approximately 70°C ( 158°F)
the output ofulb will become low enough to shunt the non-inverting bias for ula. The
supply voltage to the RF driver stage is, thus, reduced to protect the RF power module
from overheat.
(T/R Switching Circuit)
To use common antenna and the lowpass filter network for transmission and reception,
the FM-2510 uses a diode switching method. CR8 and CR9 are RF switching diodes
designed to show very low resistance and capacitance when they are forward-biased.
During transmission, both CR8 and CR9 are switched on by the forward-bias from TX
8V. Under this condition, CR8 leads the output of the RF power module efficiently to
the lowpass filter stage, and CR9 absorbs the leaked RF energy to protect the receiver
frontend.
During reception, all the above states will become opposite, and weak incoming signal
can be introduced efficiently to the receiver frontend.
1-10
---IF--~ ..1»--------------------------------------
1 .4 Receiver
The receiver uses a double superheterodyne system with intermediate frequencies of
16.9MHz and 455kHz.
RF signal induced at the antenna passes through the lowpass filter network and then
guided to the frontend of the receiver.
RFAMP/BPF
Incoming signal is first fed to the double-tuned bandpass filter consisting of T1!f2 and
Cl-C4, and then amplified by the MOS FET RF amp Ql. The resultant signal is further
filtered through triple-tuned bandpass filter consisting of T3-T5 and C6-C12. The total
frequency response of the RF amp stage is 155MHz to 165MHz (3dB) as shown below.
T6
INCOMING
SIGNAL
155MHz 165MHz
1st MIXERflF AMP/BPF
The signal from the RF stage is mixed in the mixer Ul with the 1st local frequency
(Frx-16.9MHz), which is generated by the VCO circuit. The Ul is a GaAs FET mixer
having wide dynamic range and superior intermodulation rejection response, and thus,
eliminates interference and signal distortion.
The mixer output is fed to the 1st IF amp Q2 of common-gate connection, which shows
low gain but stable amplification. The 16.9MHz component of the mixer output is
extracted through the monolithic ceramic filter FL1 having a bandwidth of 15MHz
(3dB).
The output ofFLl is further amplified through the MOS FETamp Q3, and then applied
the complex IF module U2.
1-11
FUAU•o
BW =15kHz 1st.IF AMP
1st. MIXER BUFF AMP BPF (16.9MHz)
~ ~ ~ ~
T10 03
02 T9
q! I
rx.,
RF
SIGNAL
~
rx.,
J
I if ~ AL
RX8V
1st. LOCAL
FREQUENCY
(Frx- 16.9MHz)
2nd MIXER/2nd IF AMP/DISCRIMINATOR/SOIJELCH CONTROU,ER
All the basic function blocks to convert 1st IF signal into audio signal are packed in the
hybrid module U2. U2 is composed of an MC3361 complex FM IF chip (Motorola) and
the associated components as shown below.
! ~2 f-. r -~.:_-:_·::: ::._-_::: --Li,;.ITER-::: ::._-_::: -~.:_ -:_·::: : : . _ - _ : , - - - - - - - . -! SQUELCH
GATE
1 st.IF I I MIXER AMP DISCRIMINATOR AF AMP 1 I
SIGNAL. • I AF OUT
---7~1--·-l
( 16.9MHz) 1 1
FIXED ! ~
av~ 11 I
I
mI
I
Yl
16.445MHz
FL2
455kHz
(CPU) (CPU)
1-12
