INTRODUCTION TO 8051

.MICROCONTROLLERS
.,,-,,--
: &PRNING OUTCOMES .
studying this chapter, you will be able to understand the foilowing:
, '-~.,,rences t,etween microprocessors and microcontrollers .
,• o,..., C
i . scriPlion and features of Intel M S-51 series microcontrollers ·
.

' • : , S051 microcontroller architecture and features

i : ~ower r.ontrol modes of the 8051 : ·· ,
, • $taCk operation in the 8051 · ·

.. g,1 INTRODUCTION
Tue microprocessor is a programmable chip that forms the CPU of a computer.
Nowadays, many microprocessor chips are available in the market for users to select
from depending on the application . In general, processor chips can be classified as
general-purpose microprocessors, microcontrollers, and DSP processors.
A general-purpose microprocessor is the CPU of a digital computer and
needs external components such as memory, input devices, output devices, and
decoders to function as a microcomputer system. These chips can be used to suit
any general-purpose application and can be configured by the user. Examples of
8-bit processors are Intel's 8085, Zilog 80, and Motorola 6800. Examples of 16-
bit processors are Intel's 8086 and 8088 and Motorola's 68000 and examples of
32-bit processors are Intel's 80186, 80286, and 80386, and Motorola's 68030. In
. general, these microprocessor-based systems get data from mass storage devices.
· . perfonn calculations, and store the results in storage devices. General-purpose
. microprocessors use external memory and a lot of processor time is involved in
data transfer between the external memory and the processor.
Microcontrollers are processor chips that generally have memory, input ports,
. .and output ports within the chip itself. Therefore, they can also be called single-
. · chip computers, computer-on-a-chip, or system-on-a-chip. Microcontrollers are
:, ~ in machine control applications, where there is no need to change the program.
F,quipments that use microcontrollers include computer printers, plotters, fax
machines, Xerox machines, telephones, automotive engine control mechanisms,
and electronic instruments such as oscilloscopes, multimeters, planimeters, IC
tethSlers, etc, The major difference between microprocessors and microcontrollers is
aceat mi_
·
crocontrollers are comparatively faster because of reduced external memory
. nu essing. Intel's 8031, 8051, and 8096 and Motorola's 68HC11 are examples of
croeontrollers.
 1
NTR00
304 MICROf'ROCESSOllS AND 1AiCAOOoN1'ROlLERS . . Ucr10Nro

·r· . artproccs~ing ~hip~ that hnve Acxibil'. ~s bytes. of, on-chip data RAM ('IV)
•') jJ. fo 8051 M~a,,,._
"""'lffrt , ~. 5
DS pl'OL-c<;J;(lrs ' ., I . ity in I (ill J6-bJt umers . urp0rt -~ 30
•fi . lcmcnt signal-pnll'ess111g n got1thms. These lllh.J'
(~) tWO•hiP cJock oscillator (v1) full-dupi8 of eight bits
-i.o ware. to 1111p ' , . • 1 ' Ptoce \\111t ex Serial each
. d·"'I •"t)m1r1ic and logic ontt for operat10n on f oating or f'ixcct ssors httv e ·a11., •j) ort·c
ex en "' "" .
I
' ....,
DSP "
t Like 111icroconf.l\1llcrs. , pr'Oct:ssors
,o,, ..n s. . Th
a
I I
so lave
.
on I .
·c 11p·
Poh11 ~ ·•ija•
llu ,, (~' s 9.2 (a) and 9.2 (b) show th . P<lrt
-rorL\, A/0 convl'rt<'~ and sena1 pn1ts. ey are used m mobile r11en1t1 '~bet fiso:~ctiveJy. e architecture a d
. PBX cvstems, and s1n11.1i card readers. Phone 1),I ''" go5l, reddition to these features, the 8051 n block diagr
cameras. .,.
~ 'd b
Chat1tel'!i _ gil-e 8 complete 1 ~1 a out the Intel 8-blt
1
.
s, d' v
&itar Jn \ capabilities, and an 8-bit CPU f provides B am of the
·h't ·ture• 9in<tntclion
,
set, progra111111111g.
1 ft d
and hardware interflll1croco11t
acin to(( 1
. inte~Pgo5l is an 8-bit microcontroller ~r control appJicaoottons
'd Th , 1.e th
· lean process·
tng .
im: i e,; l''e .
of microproce g. R.e,d er• , eight bits w1 e. e address b ·, e data bu . • ' srx
·h•i.ech·ipters
c. ,. r " ro know t 1e l11 amentals
are ex,v,:cted . " ers ~iP is us of the 8 s Wtthi
lstnJctu~. and as~embly language programmmg. ssors, Illeillol)oor c ess 64 l{B of memory. The lower-orde OS I is 16 . n and outside
iddf bUS, as in the 8085 processor. The port~ address bus is bits.wide. So it
data. Jexed address and data. bus· and port 2 p,· multiplexed wi'th the
:c an
9.2 1NTEL'SMCS-51 SERIES MICROCONTROLLERS ulUP . ns of th
JII .-1,e g051 is a 40-pm chip. The pow e 8051 form the
Intel Corporation has many microcontrollers in both 8-bit and 16_ . " • • er suppl
all 1 e built-ID cock 1 oscillator requir es two . Y +V cc and V tak
The 8-bit microcontrollers h in many
I havailable
are · numbers,bttconfigur
part .
With ~. atton pms (-XTAL1 ss e.\ two pm
· ·
51 d th ting the crystal. and XT
'
s
. .viCs. s.
the family name. Ftgu~ 9. s. ows t e vanous trucrocontrollers 10 connec .
T!Je four control signal pins of the 805 1 AL2) for
series. with their constituent differences. For example, 8XCS l the Mes 5as
internal ROM of 64KB, while 8XC51FC comes with only a RD
32 comes W1'th· t s own in Fig. 9.3 . onThpage 80 307. RST is an active ~re hi h ALE' EA and R
PSEN,
. . _ .. . KB ROM. an hecontroller chip. e 51 . responds to an RSThigh ·. g · reset signa1used ' to ST as
th·•h
'" for at )east two mac hme cycles · A machme . mput on! Y 'f
t the RST 1·restart
hrocessor to fetch and execute one instructi on. In cycle
the 805 is the pen.00 taken bs held
& •

0
6KB [ 32KB ]
• : ' .,
ROM ROM • - , 641<8 P
c1ockcycles taken1oramachmecycleis 12. So the RST l,themaxi . mum number Yanyf
. ~. ; : .
1

[ IKiiROII J ROM .
f• .·.
- ' ,,. ,. ...
. ·" - · ". 1s-bit .··
~. 00:' _
pmmustbehigh'
,oratl
o
east
IXC51 8XC52 8XC51FB ' BXC51FC
, !_
8XC51FA

Fig. 9.1 M1crocontrollers in Intel's MCS-51 series · -· Al\f> • A ~

. .
Table 9.1 lists tbefeatures of the 8051- family of,rmcrocontrollers.
Table 9.1 Features of the 8051 family of microcontrollers . . ALU

Device number ~ ~ width (bits) . ~ ~P!~",}'. (~ytes) ROM capacity

8031 . 8
128 M Nil ··--
8051 8 128 4 KB
General-
8751H 8 128 ·. 4KBEPROM
8052AH 8 256 8KB
8752BH 8 256 8KBEPROM ~
Syslem tining . .

All the microco troIIer chips listed i T

. Intel 8051 is nconside•ed
The & n able 9. l have the same basic architecture, EA
· set, and softw • 1or further ct·iscuss10n
mstructton . m. the topics that deal with .PSEN
.
are and hardware mterfacing in Chapters 9-12. XTAl.1
93INT
. EL 8051 ARCHITECTURE
The main featur : . . .
. es availabl .
(1) 8-bit CPU em the 8051 chips are as follows· 0
(ii) 4 KB of on-chi~ program mem 1'Y
 V
12,.,.:0
r'JVA'1 f

- ......
·1
i

t
g;Wl 2
CE,11)1'1.3
CE)(!IP1.4
CEJ~5
3

&
If CEJ.3/Pf.6 1
~ ~,1 8
I!i R5T
RXDIP3.0
9
10
u TX0/1'3.1 11 t

I
Ii
I jiif()lf'32
jjTIJP3.3
TM'3A
T1/P3.5
12
13
14
15
·~
1'2.7/AfS
i

WRJP3.6 16
I ROIP3,7 17
P2~ Al1
XTAl.2 18
P2.21.1,10
XTAl.1 19
V• 20 2f P2.0IA8
~- ~ ~ ~-~ . ~ / > ' f t - . ~ ~ . ·.. ' µ
.~ Fig. 9.3 Pin details of 8051 DIP IC --.,c,...,.~,,
WI'~~ !~
. ii,1-"1! ... Mermy
f$. 1111#
I
Ml 11,,'-- -
r
l'll9llfflmemory l
Oalafflll!U'/
I
P30-P3 7
J
r
iillfflll (4KB)
t
-••-...___1 ·tt
Exlema1(64KB) lnlemal(128bytas) Eld!rral (&IKB) \.
· ,fa~-""'~-~-~~~.':~~~~~~~
'.,....,....--,--1?'""'*"""
pav-~~HC'a',.,_,.._,..P'l""{,~~,.,.-s~:9""~••i:o~~~--_.,,.......;;,;;;..,;;.;;;;;,;;:;;;.,,J Fig. 9.4 Memory organization in the 8051
. Fig. 9.2 (b) 8051 block diagram
microcontroller can access 64 KB of program memory and 64 KB of data memory.
24 ~luck pcriodl, PSEN, ALE, and EA are the signals used in conjunction with The user can configure the entire program memory outside the chip or use 4 KB
theex1en1ul memory ucceNs of the 8051 . They are discussed in detail in Chapters inside and 60 KB outside the chip. The internal data memory is accessed with 8-hit
II and 12.
addresses and the external data memory with 16-bit addresses. So the maximum
data memory that can be connected to the 8051 system is 64 KB.
U MEMORY ORGANIZATION
In thc 80SI. the memory is organized logically inl.O program memory and dalll 9,5INTERNAL RAM STRUCTURE
rncm,~ry iiepar~tely. The program memory is read-only type; the data memory is The 8051 has 128bytes of internal data RAM, which is accessible as bytes or
i1ri;an11.c<J 1111 read wri•n
. , . ~ "'memory. Again, , both . can
program and data memories sometimes as bits. The mapping of the internal RAM is shown in Fig. 9.5.
th
be Within e clup or outside. Figure 9.4 shows the various options available for
n1cmory organization in the 805 J. The address of the internal RAM starts at OOH and occupies space up to
7
:ti .° 8
uud~:: 1 151 has 128bytes of RAM und 4 KB of ROM within the chip. The
· u~o.t 1e805! is 16 hit 'd S .
PH. The RAM space is divided into three blocks-the register banks, the bit-
addressable memory, and the scratch pad memory.
memory 15 orgunii.e<l se . , s w, c., o tl can access 64 KB of memory. As the M The S05 I-has four register banks of eight registers each, wilh addresses from
parately us program memory and data memory, the 8051 wHto IFH· In assembly
language, they are addressedbYthe names RO-R7. The
 IIITRooucno..10 ~!
o.reth e
registers that control the entire
• Th pr0Ces50r
~ 309
or'/• t address mg. e common SfRs are list . . 1'1.- • uc y can be
~,11i.v direc ( available in the 805 I are as &ollow ed in Table 9 2 acces~
IYvi jste s 1
' s: ··
ot1 'filereg rnuJators-A and B
;,. ., p..ccu r status word- PSW
(I oeessO
(iil pr rt registers-PO, Pl , P2, and P3
rf jji) JIO Po inters-DPH and DPL
" \j~) pa~aidata buffer register-SBUF
~ (~) se:k p0inter-SP
ti· (l'il s~a er registers-THO, TIil and TLO, TLI
!~ (l'iil f'.Jller control registers-TCON and TMOD
~
f (\'iii) fiJll
power
and port control-PCON and SCON
. . IP
I (~)
( ) rnterru
pt control registers- and IE
.
i ers should not use the addresses in the ran
'lf 7F 78 graJll1l1 . ge 8OH-fFH (
frO as they are used by Intel Corporation for exp d'
2E n 70 ~ . ~~thefu .other than
.. (bes '{be 8051 hast~~ ac~umulato~~~egisters A and B. Re ·s nctions ofthe
20 6F 68
61 60 so5 1· tor for mult1plicat1on and d1v1S1on instructions· fi thegi ~ B forms the
2C ulllU1a , or o r IDSlructi .
28 5F 58 ~ cessed as a general-purpose register. ons 1t
08 R3 i;3ll!JeaC 51. . ed . . '
R2 2A fj/ 50 stack in the 80 1s orgaruz w1thm the internal RAM
"
II R1 29 4F
47 .
48
40
'!be ·s eight bits wide and has to be initialized with an addres . area.the The stack
IVlintefi • . sm RAM
ae RI) 28 r the 8051 is reset, the stack pomter 1s by default set to 07H The
\VheD • ~
38 . • stack pomter
a, R1 l1
.,
3F
. . . cremented before stonng a data m the stack. Si1DJlariy whil
~ Jil
.
e reading data
•
05
R6
R5
26
. 2S 2F
30
28
•
.
,
front the stack, the data 1s read first and then the stack pointer is decrcmcn
ted.
oc R4 24 'l7 20
Table 9.2 Special function registers of 8051
m R3 23 1F 18
112 R2 22 17 10 l)nCladdressed SFR Direct addressed SFR
OI R1 21 OF 08 ·JlllfflOIYaddress . ~ address · : l'
00 fl) . 20 07 00 . 30 ~-' " " ~·~

PO
..... ,.:..; ·.~.... iait.~ ...,t K~
80 90 Pl .
'
. . ,.
i
Algisw bm . . '
t'
Bit-addres&able
.t
General1upose saall pll t
81 SP · 98 SCON
l~i Ii Ii 41, . ► .4)4. \iY'½!'A.M4 hi ; , t.Zffe;,l¾ J
82 DPL 99 SBUF
.p;.,,. i.,. f 4 . .:;i:4 ,,.-,,, l'Rib\llfiC.IA&,ii( ;.;up;W'f.$,foJ ► .9 4M4i@f4 ·

Fig. 9.5 8051 internal RAM map 83 DPH AO P.2

87 TCON AS
register banks are identified with two bits in the processor status word (PSW). The IE
88 TMOD
PSW has two bits for identifying the register bank, i.e., 00 represents bank 0, 01 BO P3
89 TLO
represents bank 1, lO represents bank 2, and 11 represents bank 3. B8 IP
In_the SOS 1, bitwise operations are also possible with special instructions using
8A
lLl DO PSW
the bit addresses. The bit-addressable memory is both bit-addressable (from OOH 8B
THO EO ACC
7 8C
io_ FH) and byte-addressable (from 20H to 2FH). Bit operations are helpful in THI B
many control algorithms.
PO
Using genera). d ·ie 952
data 31 • purpose scratch pad memory programmers can read an wn ' • Processor Status Word .
any tune for any purnru:.. Th'1
to the address ?PH. ·r-=,
'
s memory ranges from the byte a
ddress JOH :~h:sw con~ins all the flags of the 8051 and is eight bits wide. The bit pattern
are flag register is given in Table 9.3. From the table, it can be seen that there
9.5.1 Special Function R . . . ~ se~en flag bits in the PSW of the 8051. The PSW is accessible fully a\ an 8'
s . . eg1sters 1
register w·th th . . .. ual b'ts
pecial function registers (Sc,,,_ · ·· · ternal ' 1 e address DOH. Meanwhile, mdiv1d 1 0fthe .PSW can be
n,i;), which occupy the upper 128bytes of the Ill
 R()CONTROLLERS
oPJWC1:SSO!IS ANO MIC INTROOlJi:r
ION TO 8051 f.l!CR
310 ulCR . en in Table 9.3. 111c contct11s of ti
' dJr(.'SSCS g1v le 11,~\\i or and register B ~re also bit-addresijable The . OCo!iiR~ERS 311
. h ihc !,11 3 11" 11rfl11lal ulator and register B are given int bl hit addres~s of
ces\ed w,1 third row. '"11 .
ac ·: re aivcn in ihe ace occu rn a es 9.S (a) and 9 S a11 the
ret;el a .. t ablt •·~
10 PSW format of'8051
~ 0flhe
b,15
T ble 9,5 (a) Addresses and contents of a
a
· lb),

_ .. , C 11 FO JRSI
t r
1 RSO ov {~~- ..
1)111 ·-0··,-,.1·! ]
-·-· . -r -- CCUmlJlator bits
I ~
A
-
.cc] , Acc.2
. T
, ... -·" _____ ....
I f'SW ,,
i (Y_ J..I ~- . H D5H ' D4H-~ .D3H
'1 D7H ' ✓- --~ ..
tot bit• • ------ - - .. . --.. ~ . . . -
ACC.7 ACC.6j ACC.1 ACC.4_(
. Ace ,1 Ace
..•
1
·· : --.
r
Q
-l·
uu • ' . - .•
O
- -- ... •·
O Q
. - 1 " ''
}(--._ • '-'l))j
rr u111ull . . . - ····--··-r' ..._ ,. . l, .O,
'. o. .: 0. , - ·
> ,

; snaddf'I•upon,..el
• ·- 1 , ~" - .. - · E7 E6 ES E4 E3 ' -, ... -1· - ....
l
• • ·--·--- - ----
•-.1
i'" f< ~dres• --·- --- -- --- - I e:2 '. E1 i EO ;
[ tOflllt!IS - .. 'fthe accumulator contains an odd number or · I Sfl"' .- o O O IO I ---,-..._ -t--...J
• . 11 is i;et t.o 1 I •
Peril!' bil (P) ls, ari, l, ·' ponreset O 10 ( o ro .
. 10 n,,.ra11on. r
: 11·c or logrca ,·-·
1111 anthme
. .
• fl .s set dunng ALU operations, to indicate
.
v-
r ,,,,,.,olf ~- - ..............____--!.
---· '

;---
, I\ This ag I, . •h h D . overn Table 9.5 (b) Addresses and contents of register B-bits
~ f t~
O\'l'rnv
ftag (0
.
,, tO .t if there 1•s a carry out• of e1t . er t e .7 bit or the O6 b'to\1/
. the ~lilt- It ,s set fl . set when anthmet1c opcrattons such as I or
in . overflow ag t5 . add ilnd B.7 B.6 B.5 B.4
the accumulator. . tlict ·stet BbllS B.3
B.I j B.O
tract result in sign con h' ·h the oV flag is set are as follows: Re9
1
- - ·. · '
sub . under w 1c ✓------
The condl11onIP ·a·ve == Negative
' F7 F6 PS F4 F3 F2 Fl --➔
., · e + OSI SH address------:- FO !
Posiuv • - Positive ..--- 0 0 0
Ne alive+ Negauve - . . ; .011 upon reset 0 0 0
~ . - ·Negalive = Negauve
Pos111ve .•
0 rD
I

Neeauve-. Positive = Pos1t1ve

ER CONTROL IN 8051
g,6P0W
. ~bank select b1'ts (RSO and RSl) These bits are user-progranunabi . ..
h . e,
·Register by the programmer to point to t e correct . register banks· .,,,_
•ne 8051 has Various power control. modes, which are used to control the power ·
They . canbankbe selection
set . m . the programs can be changed usmg these two bits. The ed b the microcontroller chip. Some of these modes let the microcontroller
register .
Table 9.4 explams how these bits can be changed to select the appropriate
co~s~:a 'sl~ep' mode, which makes it consume lesser power than during llormal
go ,n . The power control modes are selected through the Special Function
ope
register bank. rauon. . . f .
. PCON · Table 9.6 gives the bit pattern o the PCON register. -
Register
Table U Register bank selection using PSW
Table 9.6 Bit pattern for PCON register
RS1 RSO Selected bank Address rang~-,.·"'" . _ . _.;
0 0 BankO OOH--07H ~
Bit
....' ...
Name ., Function
.-.s _...., ~ : __; ___
_
~
~

0 I Bank 1 08H--OFH 7 SMOD Serial port baud rate set bit

0 Bank2 JOH-17H 6 Reserved
Bank 3 18H-1FH 5 .;..
Reserved
4 Reserved
General-purpose flag (FO) This is a user-programmable flag: lhe user can 3 GFl General-purpose flag I
program and store any bit of his/her choice in this flag, using the bit address. 2 GF0 General-purpose flag 0
Auxiliary carry flag (AC) It is used in association with BCD anthmeuc. · · This PD Power down mode set bit
ffag is set when there is a carry out of the D3 bit of the accumulator. 0 IPL Idle mode set bit
Carry Hag (CY) This flag is used. to indicate the carry generated after arithmetic
. ir 9,6,1 Idle Mode · · .. I
operations. It can also be used as an accumulator to store one of the data bits 0 . . . PCON.0 bit is set to 1. n
The m1crocontroller enters the idle mode whenever the ed hile all other
bit-related Boolean instructions. · ' · . dition lhe 1'di h CPU are mask , w
8051 u . e mode, the clock pulses applied to t e . The contents of the CPlJ
The supports bit manipulation instructions. This means that m ad thil
to lhe byte operations, bit operations can also be done using bit data. ~:;ts of
nus such as interrupt controllers, etc. are kept active. voked from the idle mode
thc are not affected in the idle mode The processor can be re · nal These two
Plll'J)Osc, contents of the PSW are bit-addressable. Similarly, lhe con by applying. either a hardware •
interrupt or a hardware resetsig ·
 . ,,.ROCONTROLLERS
312 MlCROPROCESSORS ANDM.v

. N Oand processor ex.ccution will rcsuTbe a

actions will reset PC? . 1at set the idle mode. t tht ins
-l'ollowinct the ins1111ct1on t 1< • tqlq-
v O '

9.6.2 Power DownMode. . ,itiated by making PCON.I bit l I

The power -dow11 m~el tsd10.1ffand only the internal rnernory· jt..a '1,thrs fnr\,1
· w1tc 1e ~ ClJv "\le
clock generator is s d ,d to 2 vand the power consum . ption can b e. lhe s ' h~
V can be re uce d . . • e reul!ceq\Jp fily•
\·o1tage cc . ·1I . ucessor from powet own tnode is to re
only way to revoke ,e pt Set lfie %~l\
1
ll\,
9.7 STACK OPERATION . .
th st. k is configured as a series of memory locatfons t
In the SO~l, e (LaclFO) pattern. In general, the stack is initialized . OlJo\\ting (
Last-In Fust-Out . d . in the • 1ric
b 1·t data can be stored and retneve from the stack . tntern.
RAM area. Any - 8 k . Us1n .,. ~
. . ·
uO ns with the help of the stac pomter. grtJsttll
and POP mstruc , • • • •
. ter (SP) is an 8-b1t register w1thm the.SFR area' wi'th the:ir1..
The stack pom .
81H. This regis _ can hold one 8-b1t address at .a time,
· ter . which is actuau "\J\lre\\
. 1 ation at top of the stack. A push operat10n m the 8051 is u Ythe
memory oc . . . sect to sto
8 b·t data in the stack The PUSH mstruct10n first. mcrements the valueofSp re
an - I ' • •
then ·stores the data mentioned in the mstructlon m the memory location po· aJJd
to by SP. Similarly, the POP instruction stores the value from the top of th l!Jfed
in the register mentioned in the instruction and then decrements the Valueeo~lack
The stack pointer is initialized to the value 07H when the 8051 microcontroui'.·
reset The other instructions of the 8051 that affect the stack and the stack Po. is
are ACALL, LCALL, RET, and RETI. The stack pointer can be initialized ttter
.. . any
internal RAM address by the pr?grammer, by wntmg the required address in fue
SP SFR address 81H.

POINTS TO REMEMBER

• Intel MCS-51 is a family of microcontrollers and 8051 is the familiar IC in the

family. Different versions of the basic 8051 are available from Intel and other chlp
manufacturers.
8
· RAM'
1/0 ports ' timers, and interru~
, built-in
Th~ ~OSI is an, -bit microcontroller with
• facdity.

• The functioning of th · · ·· · all ds~i~

1~ . . e nucrocontroller is controlled using a set of registers c e r·
unct1on registers (SFRs). · · ·
• The 8051 can itself act . . . s in~de iL
If necessary m as an independent system, with all memory and port ·
' emory and 1/0 P0 rt b
• The processo · · scan . e added externally. . 'di ~•
r supports many . ode I e
etc. . · operatmg modes such as power down m '