Computer organization and Architecture 2022/1

Unit I : Introduction
i) Organization and Architecture
Why Study Computer Organization and Architecture?

The computer lies at the heart of computing. Without it most of the computing disciplines today
would be a branch of theoretical mathematics. To be a professional in any field of computing
today, one should acquire some understanding and appreciation of a computer system’s
functional components, their characteristics, their performance, and their interactions. We need
to understand computer architecture in order to structure a program so that it runs more
efficiently on a real machine. In selecting a system to use, they should be able to understand the
tradeoff among various components, such as CPU clock speed vs. memory size.
1. Suppose a graduate enters the industry and is asked the most cost-effective computer for use
throughout a large organization. An understating of the implications of spending more for
various alternatives, such as larger cache or a higher processor clock rate, is essential to making
the decision.
2. Many processors are not used in PCs or servers but in embedded systems. A designer may
program a processor in C that is embedded in some real-time or large system, such as an
intelligent automobile electronics controller. Debugging the system may require the use of a
logic analyzer that displays the relationship between interrupt requests from engine sensors
and machine-level code.
3. Concepts used in computer architecture find application in other courses. In particular, the
way in which the computer provides architectural support for programming languages and
operating system facilities reinforces concepts from those areas.

Computer Architecture
Those attributes of the system that are visible to a programmer. Those attributes that have a
direct impact on the execution of a program.
• Instruction sets
• Data representation – number of bits used to represent data
• Input/Output mechanisms
• Memory addressing techniques
Computer Organization
The operational units and their interconnections that realize the architectural specifications.
Those hardware attributes that are transparent to the programmer.
• Control signals
• Interfaces between the computer and peripherals
• Memory technology

ii) Structure and Function

A computer is a complex system; contemporary computers contain millions of
electronic components. A hierarchical system is a set of interrelated subsystems where each
subsystem is a hierarchical structure. At each level, the system consists of a set of
components and their interrelationships. At each level, a designer is concerned with
structure and function:
Structure – the way in which components relate to each other.
Function – the operation of individual components as part of the structure.
Function : The four basic functions of a computer are:

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• Processing data
• Storing data
• Moving data between the computer and the outside world
• Control the operations above

Show below is a functional view of the computer.

Operating Environment (Source and Destination of data)

Data
Movement

Control
Mechanism

Data Storage Data

processing

Structure : The four main internal structural components of a computer are:

• Central processing unit (CPU) – controls the operation of the computer and performs its
data processing functions.
• Main memory – stores data.
• Input/Output (I/O) – moves data between the computer and its external environment.
• System interconnections – some mechanism that provides for communication among
CPU, main memory, and I/O.
Compute
r

Input/output Main
Memory
System
Interconnection

Central
Processing
Unit

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probably the most interesting and in some ways the most complex component of the
computer is the CPU. The CPUs major structural components are as follows:

• Control unit – controls the operation of the CPU and hence the computer.
• Arithmetic and logic unit (ALU) – performs the computer’s data processing functions.
• Registers – provides storage internal to the CPU.
• CPU interconnections – some mechanism that provides for communication among the
control unit, ALU, and registers.

• Above on the left the structure of the CPU is shown.

• Above on the right the structure of the control unit is shown using a microprogrammed
implementation. A microprogrammed control unit operates by executing
microinstructions that define the functionality of the control unit.

iii) Computer Evolution and Performance

The evolution of computers has been characterized by increasing processor speed,
decreasing component size, increasing memory size, and increasing I/O capacity and speed.
One factor responsible for the great increase in processor speed in the shrinking size of
the microprocessor components; this reduces the distance between components and hence
increases speed. However, the true gains in speed in recent years have come from the
organization of the processor, including heavy use of pipelining and parallel execution. All of
these techniques are designed to keep the processor busy as much of the time as possible.

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A critical issue in computer system design is balancing the performance of the various
elements, so that gains in performance in one area are not handicapped by a lag in other areas.
In particular, processor speed has increased more rapidly than memory access time.
A variety of techniques are used to compensate for this mismatch, including caches,
wider data paths from memory to processor, and more intelligent memory chips.

A Brief History of Computers

The First Generation: (1946-1954). The computers using Electronic valves (vacuum tubes) are
known as First-generation computers.
Examples: EDSAC(Electronic Delay Storage Automatic Computer), EDVAC(electronic discrete
Variable Automatic Computer) and UNIVAC (UNIVersal Accounting Company)
Second Generation: (1955 – 1964) The second generation computers used transistors instead
of valves after the invention of transistors by a team of scientists led by William Shockley.
Examples: IBM 700 series
Third Generation: (1965 – 1974) Third generation computers used Integrated circuits in which
many transistors and other components are fabricated and packaged together in a single small
chip.
Examples: IBM/370 series and PDP-11 (Programmed Data Processor).
Fourth Generation: (1975 – 1989) The manufacture of integrated circuits became so advanced
as to incorporate hundreds of thousands of active components in volumes of a fraction of an
inch, leading to what is called Large-scale and Very-Large Scale Integration (VLSI). The present
day computers use VLSI chips for processing.
Examples : CRAY-2, IBM 3090/600, IBM ES/9000, VAX, IBM AS/400, HP 9000 series etc.,
Fifth Generation: (1990 – present) The fifth generation computers are under development
stage. These computers will use ULSI (Ultra-Large-Scale-Integration)chips. These will be
employed two or more processors which compute in parallel.

Designing for Performance

Microprocessor Speed
• Chipmakers release new generations of chips every three years – each with four
times as many transistors
• Memory chips have quadrupled the capacity of dynamic-access memory (DRAM) every three
years
• Microprocessor speed boosts that come from reducing the distance between circuits has
improved performance four- or fivefold every three years since Intel launched the x86 family in
1978
Performance Balance
While processor power has raced ahead at breakneck speed, other critical components
of the computer have not kept up. The result is a need to look for performance balance: an
adjusting of the organization and architecture to compensate for the mismatch among the
capabilities of the various components.
Nowhere is the problem created by such mismatches than in the interface between
processor and main memory. While processor speed and memory capacity have grown rapidly,
the speed with which data can be transferred between main memory and the processor has not.

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The interface between processor and main memory is the most critical pathway in the
entire computer, because it is responsible for carrying a constant flow of program instructions
and data between memory chips and the processor.
The amount of main memory is going up but, but DRAM density is going up faster. The
net result is that, on average, the number of DRAMs per system is going down. This has an affect
on transfer rates, because there is less opportunity for parallel transfer of data.

There are a number of ways that a system architect can attack this problem:
• Increase the number of bits that are retrieved at one time – wider data paths
• Change the DRAM interface – include cache or other buffering techniques
• Reduce the frequency of memory access –include one or more level of cache
both on- and off-chip between the processor and main memory
• Increase the interconnect bandwidth between processors and memory – higher speed buses
and using a hierarchy of buses to buffer and structure data flow

IV) A View of Computer Function and Interconnection

An instruction cycle consists of an instruction fetch, followed by zero or more operand fetches,
followed by zero or more operand stores, followed by an interrupt check (if interrupts are
enabled)
The major computer system components (processor, main memory, I/O modules)need to be
interconnected in order to exchange data and control signals. The most popular means on
interconnection is the use of a shared system bus consisting on multiple lines.
Computer Components
The von Neumann architecture is based on three key concepts:
• Data and instructions are stored in a single read-write memory.
• The contents of this memory are addressable by location, without regard to the type of data
contained there.
• Execution occurs in a sequential fashion (unless explicitly modified) from
one instruction to the next.
A computer can be programmed by using a small set of basic logic components that store binary
data and perform arithmetic and logical operations on data. Programming in hardware is
termed a hardwired program. This customized hardware system accepts data and produces
results. This customized hardware system is not very flexible because for each new program,
this customized hardware must be rewired.
As an alternative, construct a general-purpose configuration of arithmetic and logic functions.
This set of hardware will perform various functions on data depending on control signals
applied to the hardware. This general-purpose hardware system accepts data and control
signals and produces results. For each new program, the programmer merely needs to supply a
new set of control signals.
Instead of rewiring the hardware for each new program, simply provide a new sequence of
codes. Each code is, in effect, an instruction, and part of the hardware interprets each instruction

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and generates control signals. To distinguish this new method of programming, a sequence of
codes or instructions is called software.
Shown below are these top-level components and basic interaction between them:

• CPU – combination of the instruction interpreter (control unit) and the

General purpose arithmetic and logic functions (ALU)
• Input/output module – used to enter data and instructions and to report results
• Main memory module – used to store both data and instructions

The CPU exchanges data with memory. The CPU typically makes use of two internal
registers: a memory address register (MAR), which specifies the address in memory for the
next read or write, and a memory buffer register (MBR), which contains the data to be
written into memory or receives the data read from memory.

Similarly, an I/O address register (I/OAR) specifies a particular I/O device. An I/O buffer
register (I/OBR) is used for the exchange of data between an I/O module and the CPU.
A memory module consists of a set of locations, defined by sequentially numbered
addresses. Each location contains a binary number that can be interpreted as either an
instruction or data.

An I/O module transfers data from external devices to CPU and memory, and vise versa. It
contains internal buffers for temporarily holding these data until they can be sent on.
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Computer Function
The basic function performed by a computer is execution of a program, which consists of a
set of instructions stored in memory. The processor does the actual work by executing
instructions specified in the program. In the simplest form, instruction processing consists
of two steps: the processor reads (fetches) instructions from memory one at a time and
executes each instruction.

The processing required for a single instruction is called an instruction cycle. An

instruction cycle is shown below:

Program execution halts only if the machine is turned off, some sort of unrecoverable error
occurs, or a program instruction that halts the computer is encountered.

Instruction Fetch and Execute

• The processor fetches an instruction from memory – program counter (PC) register holds
the address of the instruction to be fetched next
• The processor increments the PC after each instruction fetch so that it will fetch the next
instruction in the sequence – unless told otherwise
• The fetched instruction is loaded into the instruction register (IR) in the processor – the
instruction contains bits that specify the action the processor will take.
• The processor interprets the instruction and performs the required action In general,
these actions fall into four categories:

• Processor-memory
– Data transferred to or from the processor to memory
• Processor-I/O
– Data transferred to or from a peripheral device by transferring between
the processor and an I/O module
• Data processing
– The processor performs some arithmetic or logic operation on data
• Control
– An instruction may specify that the sequence of execution be altered.
An instruction execution may involve a combination of these actions.

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The execution cycle for a particular instruction may involve more than one reference to
memory. An instruction may specify an I/O operation instead of a memory reference.

The state diagram below shows a more detailed look at the instruction cycle:

For any given instruction cycle, some state may be null and other may be visited more than
once. These states can be described as follows:

• Instructions address calculation (iac): determine the address of the next instruction to
be executed. Usually this involves adding a fixed number to the address of the previous
instruction.
• Instruction fetch (if): read instruction from memory into the processor.
• Instruction operation decoding (iod): analyze instruction to determine type of
operation to be performed and operand(s) to be used.
• Operand address calculation (oac): if the operation involves reference to an operand in
memory or available via I/O, then determine the address of the
Operand.
• Operand fetch (of): fetch the operand from memory or read it in from I/O.
• Data operation (do): perform the operation indicated in the instruction.
• Operand store (os): write the result into memory or out to I/O.
Interconnections Structures

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A computer consists of a set of components or modules (processor, memory, I/O) that

communicate with each other. A computer is a network of modules. There must be paths for
connecting these modules. The collection of paths connecting the various modules is called
the interconnection structure.

• Memory
o Consists of N words of equal length
o Each word assigned a unique numerical address (0, 1, …, N-1)
o A word of data can be read or written
o Operation specified by control signals
o Location specified by address signals

• I/O Module
o Similar to memory from computers viewpoint
o Consists of M external device ports (0, 1, …, M-1)
o External data paths for input and output
o Sends interrupt signal to the processor

• Processor
o Reads in instructions and data
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o Writes out data after processing

o Uses control signals to control overall operation of the system
o Receives interrupt signals

The preceding list defines the data to be exchanged. The interconnection structure must
support the following types of transfers:
• Memory to processor: processor reads an instruction or a unit of data from memory.
• Processor to memory: processor writes a unit of data to memory.
• I/O to processor: processor reads data from an I/O device via an I/O module.
• Processor to I/O: processor sends data to the I/O device via an I/O module.
• I/O to or from memory: an I/O module is allowed to exchange data directly with
memory, without going through the processor, using direct memory access (DMA).

Over the years, a number of interconnection structures have been tried. By far the most
common is the bus and various multiple-bus structures.

Bus Interconnection
A bus is a communication pathway connecting two or more devices. Multiple devices can be
connected to the same bus at the same time. Typically, a bus consists of multiple communication
pathways, or lines. Each line is capable of transmitting signals representing binary 1 or binary 0. A
bus that connects major computer components (processor, memory, I/O) is called a system bus.
Bus Structure: Typically, a bus consists of 50 to hundreds of separate lines. On any bus the lines are
grouped into three main function groups: data, address, and control. There may also be power
distribution lines for attached modules.

• Data lines
o Path for moving data and instructions between modules.
o Collectively are called the data bus.
o Consists of: 8, 16, 32, 64, etc… bits – key factor in overall system performance
• Address lines
o Identifies the source or destination of the data on the data bus.
􀂃 CPU needs to read an instruction or data from a given memory location.
o Bus width determines the maximum possible memory capacity for the system.
􀂃 8080 has 16 bit addresses giving access to 64K address
• Control lines
o Used to control the access to and the use of the data and address lines.

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o Transmits command and timing information between modules.

Multiple-Bus Hierarchies
If a great number of devices are connected to the bus, performance will suffer.
• Propagation delays
o Long data paths mean that coordination of the bus use can adversely affect
performance.
• If aggregate data transfer approaches capacity
o Increasing data rate or making the bus wider may help.
Most computer systems use multiple buses, generally laid out in a hierarchy.

The traditional bus architecture shown in the previous figure is reasonably efficient but begins
to break down as higher and higher performance is seen in the I/O devices. In response to these
growing demands, a common approach taken by industry is to build a high-speed bus that is
closely integrated with the rest of the system, requiring only a bridge between the processor’s
bus and the high-speed bus. This arrangement is sometimes known as mezzanine architecture.
The figure below shows an example of using this approach:

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Bus width
The width of the data bus has an impact on system performance: The wider the data bus, the
greater the number of bits transferred at one time.
The width of the address bus has an impact on system capacity: The wider the address bus, the
greater the range of locations that can be referenced.
Data Transfer Type
• Multiplexed
o Single shared bus for both addresses and data
o Bus first used to specify an address
o Bus then used to transfer data
• Dedicated
o Separate buses for both address and data
o The address is specified on the address bus and remains while data
transferred
o The data is transferred on the data bus
PCI (Peripheral Component Interconnection)
PCI has been developed by Intel. It is a 32bit bus which extends the processor’s own local
bus, and can be expanded upto 64 bit when need arises. The PCI bus system is able to
support 10 devices. Because, PCI devices do not electrically load down the CPU bus.
The PCI bus system can transfer data at a rate of 130 MB per sec at 33 MHz.
PCI bus is a high performance connection between the motherboard components and
expansion boards of a system.

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There is a bridge chip between the processor and the PCI bus, which connects the PCI bus to the
processor’s local bus. This allows to connect PCI peripherals directly to the PCI bus.
Once a Host bridge is included in the system, the processor can access all available PCI
peripherals. This makes the PCI bus standard processor independent. When a new processor is
to be used, only the bridge chip needs to be replaced, the rest of the system remains unchanged.
 PCI bus employs a 124 pin, micro channel style connector (188 pin for a 64 bit systems)
 PCI specification are for 2 types of connection 5V system and 3.3v low power system.
 PCI design have ability to support future generation of peripherals.
USB – Universal Serial BUS
- Its is a high speed serial bus
- Its data transfer rate is higher than that of a serial port.
- It allows to interface several devices to a single port.
o It supports interface for a wide range of peripherals such as monitor,
keyboard, mouse, modem, speaker, microphone, scanner, printer, etc.,.
- It provides power lines along with data lines
- USB cable contains 4 wires
o 2 wires are used to supply electrical power to peripherals.
o 2 wires are used to send data and commands.

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