WEST GODAVARI INSTITUTE OF SCIENCE

AND ENGINEERING COLLEGE

DEPARTMENT OF ELECTRONICS AND

COMMUNICATION ENGINEERING

Head of the Department: L. Sankar

Lab In-Charge Faculty: K. Lalitha

EDC LAB MANUAL

REGULATION-R20

YEAR & SEM: II ECE & I SEM

Dept of ECE, WISE

 List of Experiments

S. No Name of the Experiment

1 P-N DIODE CHARACTERISTICS

2 ZENER DIODE CHARACTERISTICS

RECTIFIERS WITH & WITHOUT FILTERS

3

BJT CHARACTERISCTICS(CE CONFIGURATION)

4

5 FET-CHARACTERISCTICS

SCR CHARACTERISTICS
6

7 UJT CHARACTERISTICS

8 BJT CE-AMPLIFIER

9 EMITTER FOLLOWER-CC AMPLIFIER

10 FET-CS AMPLIFIER

11 CRO OPERATION AND ITS MEASUREMENTS

Dept of ECE, WISE

1. P-N JUNCTION DIODECHARACTERISTICS

AIM:-To observe and draw the Forward and Reverse bias V-I Characteristics of a
P-N Junction diode.
APPARATUS

P-N Diode-IN400
Regulated Power supply (030v)
Resistor1KΩ
Ammeters (0-200 mA, 0-500mA)
Voltmeter (0-20V)
Breadboard
Connecting wires

A p-n junction diode conducts only in one direction. The V-I

THEORY:-
Characteristics of the diode are curve between voltage across the diode and
current through the diode. When external voltage is zero, circuit is open and the
potential barrier does not allow the current to flow. Therefore, the circuit current is
zero. When P-type (Anode is connected to +ve terminal and n- type (cathode) is
connected to –ve terminal of the supply voltage, is known as forward bias. The
potential barrier is reduced when diode is in the forward biased condition. At
some forward voltage, the potential barrier together eliminated and current starts
flowing through the diode and also in the circuit. The diode is said to be in ON
state. The current increases with increasing forward voltage.
When N-type (cathode) is connected to +ve terminal and P-type
(Anode) is connected –ve terminal of the supply voltage is known as reverse bias
and the potential barrier across the junction increases. Therefore, the junction
resistance becomes very high and a very small current (reverse saturation
current) flows in the circuit. The diode is said to be in OFF state. The reverse bias
current due to minority charge carriers.

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CIRCUITDIAGRAM:-
FORWARDBIAS:-

REVERSEBIAS:-

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MODELWAVEFORM:-

PROCEDURE:-
FORWARDBIAS:-

1. Connections are made as per the circuit diagram.

2. For forward bias, the RPS +ve is connected to the anode of the diode and
RPS –ve is connected to the cathode of the diode,
3. Switch on the power supply and increases the input voltage (supply voltage) in
Steps.
4. Note down the corresponding current flowing through the diode and voltage
across the diode for each and every step of the input voltage.
5. There adding of voltage and current are tabulated.
6. Graph is plotted between voltage and current.

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OBSERVATION:-

S.NO APPLIED VOLTAGE(V) VOLTAGE ACROSS CURRENT

DIODE(V) THROUGH
DIODE(mA)

PROCEDURE:-
REVERSEBIAS:-
1. Connections are made as per the circuit diagram
2. For reverse bias, the RPS +ve is connected to the cathode of the diode and
RPS –ve is connected to the anode of the diode.
3. Switch on the power supply and increase the input voltage (supply voltage) in
Steps
4. Note down the corresponding current flowing through the diode voltage
across the diode for each and every step of the input voltage.
5. The readings of voltage and current are tabulated
6. Graph is plotted between voltage and current.
OBSEVATION:-

S.NO APPLIED VOLTAGE CURRENT

VOLTAGE ACROSS THROUGH
ACROSS DIODE(V) DIODE(V) DIODE(µA)

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PRECAUTIONS:-

1. All the connections should be correct.

2. Parallax error should be avoided while taking the readings from the Analog
meters.

RESULT:-Forward and Reverse Bias characteristics for a p-n diode is

observed

VIVA QESTIONS:-

1. Define depletion region of a diode?

2. What is meant by transition & space charge capacitance of a diode?
3. Is the V-I relationship of a diode Linear or Exponential?
4. Define cut-in voltage of a diode and specify the values for Si and Ge diodes?
5. What are the applications of a p-n diode?
6. Draw the ideal characteristics of P-N junction diode?
7. What is the diode equation?
8. What is PIV?
9. What is the break down voltage?
10. What is the effect of temperature on PN junction diodes?

Dept of ECE, WISE

 2. ZENERDIODECHARACTERISTICS

AIM:- a) To observe and draw the V-I characteristics of a zener diode

b) To find the voltage regulation of a given zener diode

APPARATUS:-
Zener diode.
Regulated Power Supply (0-30v)
Voltmeter (0-20v)
Ammeter (0-100mA)
Resistor (1KOhm)
Bread Board
Connecting wires

CIRCUIT DIAGRAM:-

V-I CHARACTERISTICS:-

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REGULATION CHARACTERISTICS:-

Theory:-
A zener diode is heavily doped p-n junction diode, specially
made to operate in the break down region. A p-n junction diode normally does
not conduct when reverse biased. But if the reverse bias is increased, at a
particular voltage it starts conducting heavily. This voltage is called Break down
Voltage. High current through the diode can permanently damage the device
To avoid high current, we connect a resistor in series with zener
diode. Once the diode starts conducting it maintains almost constant voltage
across the terminals whatever may be the current through it,i.e.,it has very low
dynamic resistance. It is used in voltage regulators.

PROCEDURE:-

V-I characteristics:-

1. Connections are made as per the circuit diagram.

2. The Regulated power supply voltage is increased in steps.
3. The zener current (lz), and the zener voltage (Vz.) are observed and then
noted in the tabular form.
4. A graph is plotted between zener current (Iz) and zener voltage (Vz).

Dept of ECE, WISE

Regulation characteristics:-

1. The voltage regulation of any device is usually expressed as percentage

regulation
2. The percentage regulation is given by the formula
((VNL-VFL)/VFL)X100
VNL=Voltage across the diode, when no load is
connected.VFL=Voltage across the diode, when load is
connected.
3. Connection are made as per the circuit diagram
4. The load is placed in full load condition and the zener voltage (Vz), Zener
current (lz), load current (IL) are measured.
5. The above step is repeated by decreasing the value of the load insteps.
6. All the readings are tabulated.
7. The percentage regulation is calculated using the above formula

OBSERVATIONS:-

V-I characteristics:-

ZENER ZENER
S.NO VOLTAGE(VZ ) CURRENT(IZ )

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Regulation characteristics:-

VNL(VOLTS) VFL(VOL RL(K %REGULATI

S.N0 TS) Ώ) ON

MODELWAVEFORMS:-

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PRECAUTIONS:-
1. The terminals of the zener diode should be properly identified
2. While determined the load regulation, load should not be immediately
shorted.
3. Should been sure that the applied voltages & currents do not exceed the
ratings of the diode.

RESULT:-

a) V-I characteristics of zener diode are obtained and drawn.

b) Percentage regulation of zener diode is calculated.

VIVAQUESTIONS:-
1. What type of temp? Coefficient does the zener diode have?
2. If the impurity concentration is increased, how the depletion width effected?
3. Does the dynamic impendence of a zener diode vary?
4. Explain briefly about avalanche and zener breakdowns?
5. Draw the zener equivalent circuit?
6. Differentiate between line regulation & load regulation?
7. In which region zener diode can be used as a regulator?
8. How the breakdown voltage of a particular diode can be controlled?
9. What type of temperature coefficient does the Avalanche breakdown has?
10. By what type of charge carriers the current flows in zener and avalanche
breakdown diodes?

Dept of ECE, WISE

 3. RECTIFIERS WITH&WITHOUTFILTER

AIM: - a) To obtain the load regulation and ripple factor of a half wave-rectifier With Filter and

Without Filter
b) To obtain the load regulation and ripple factor of a full wave-rectifier With Filter and

Without Filter

APPARATUS:

Semi conductor trainer kit

P-n Diodes, (lN4007) ---2 No’s

Multi meters – 2No’s

Filter Capacitor (470µF/25v)-1 No’s

Connecting Wires-Required
Load resistor, 10KΩ

THEORY:
HALFWAVE RECTIFIER:
During positive half-cycle of the input voltage, the diode D1 is in forward bias and
conducts through the load resistor R1. Hence the current produces an output voltage
across the load resistor R1, which has the same shape as the +ve half cycle of the
input voltage.

During the negative half-cycle of the input voltage, the diode is reverse
biased and there is no current through the circuit. i.e., the voltage across R1 is
zero. The net result is that only the +ve half cycle of the input voltage appears
across the load. The average value of the half wave rectified o/p voltage is the
value measured on dc voltmeter.
For practical circuits, transformer coupling is usually provided for
two reasons.
1. The voltage can be stepped-up or stepped-down, as needed.

Dept of ECE, WISE

 2. The ac source is electrically isolated from the rectifier. Thus
preventing shock hazards in the secondary circuit.

FULL WAVE RECTIFIER:

The circuit of a center-tapped full wave rectifier uses two diodes D1 &
D2.During positive half cycle of secondary voltage (input voltage), the diode D1 is
Forward biased and D2 is reverse biased.

The diode D1 conducts and current flows through load resistor RL. During
negative half cycle, diode
D2 becomes forward biased and D1 reverse biased. Now, D2 conducts
and current flows through the load resistor RL in the same direction. There is a
continuous current flow through the load resistor R L, during both the half cycles
and will get unidirectional current as show in the model graph. The difference
between full wave and half wave rectification is that a full wave rectifier allows
unidirectional (one way) current to the load during the entire 360 degrees of the
input signal and half-wave rectifier allows this only during one half cycle
(180degree).

CIRCUIT DIAGRAM:

HALF WAVE RECTIFIER:

WITH FILTER:

WITHOUT FILTER:

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FULL WAVE RECTIFIER:

WITH FILTER:

WITH OUT FILTER:

PROCEDURE:-

HALF-WAVE RECIFIER:
1. Connections are made as per the circuit diagram.
2. Connect the primary side of the transformer to ac mains and the secondary
side to the rectifier input.
3. By the multi-meter, measure the ac input voltage of the rectifier and, ac and
dc voltage at the output of the rectifier.
4. Find the theoretical of dc voltage by using the formula,

Vdc=Vm/П

Where, Vm=2Vrms, (Vrms=output ac voltage.)

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 The Ripple factor is calculated by using the formula
r=ac output voltage/dc output voltage.

REGULATION CHARACTERISTICS:-
1. Connections are made as per the circuit diagram.
2. By increasing the value of the rheostat, the voltage across the load and
current flowing through the load are measured.
3. The reading is tabulated.
4. Draw a graph between load voltage (VL and load current(IL) taking VL on
X-axis and IL on y-axis
5. From the value of no-load voltages, the %regulation is calculated using
the formula,

FULL-WAVE RECIFIER:

1. Connections are made as per the circuit diagram.

2. Connect the ac mains to the primary side of the transformer and the
secondary side to the rectifier.
3. Measure the ac voltage at the input side of the rectifier.
4. Measure both ac and dc voltages at the output side the rectifier.
5. Find the theoretical value of the dc voltage by using the formula
Vdc=2Vm/П
6. Connect the filter capacitor across the load resistor and measure the
values of Vac and Vdc at the output.
7. The theoretical values of Ripple factors with and without capacitor are
calculated.
8. From the values of V ac and V dc practical values of Ripple factors are
calculated. The practical values are compared with theoretical values.

Dept of ECE, WISE

 Theoretical calculations for Ripple factor:-

HALF-WAVE RECTIFIER:

WITH OUT FILTER:

Vrms=Vm/2

Vm=2Vrms

Vdc=Vm/П
Ripple factor r=√ (Vrms/Vdc)2-1=1.21

WITH FILTER:

Ripple factor, r=1/ (2√3fCR)

Where f=50Hz
C =100µF

RL=1KΩ
FULL-WAVE RECTIFIER:
Vrms = Vm/ √2

Vm=Vrms√2

Vdc=2Vm/П
WITHOUT FILTER:

Ripple factor, r=√ (Vrms/Vdc) 2-1=0.482

WITH FILTER:

Ripple factor, r=1/ (4√3fCRL)

Where f=50Hz
C =100µF

RL=1KΩ

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Practical Calculations for HALF-WAVE RECTIFIER:

Vac=
Vdc=
Ripple factor without Filter =
Ripple factor with Filter =

Observations for HALF-WAVE RECTIFIER:

WITHOUTFILTER

USING Vac(v) Vdc(v) r=Vac/Vdc

DMM

WITHFILTER

USING Vac(v) Vdc(v) r=Vac/Vdc

DMM

WITHOUT FILTER
Vdc=Vm/П, Vrms=Vm/2, Vac=√ (Vrms2-Vdc2)

Vm( Vac(v) Vdc(v) r=Vac/Vdc

v)
USINGC
RO

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 WITHFILTER
V1(V) V2(V) Vdc=(V Vac= r=V
USINGCRO 1+V2)/2 (V1-V2)/2√3 ac/

Vdc

Practical Calculations for FULL-WAVE RECTIFIER:

WITHOUT FILTER

Vac=

Vdc=
Ripple factor, r=Vac/Vdc

WITHFILTER

Vac=

Vdc=
Ripple factor, Vac/Vdc

Observations for FULL-WAVE RECTIFIER:

WITHOUT FILTER

USING Vac(v) Vdc(v) r=Vac/Vdc

DMM

WITHFILTER

USING Vac(v) Vdc(v) r=Vac/Vdc

DMM

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WITHOUT FILTER

Vrms=Vm/√2 , Vdc=2Vm/П, Vac=√ (Vrms2-Vdc2)

Vm(v) Vac(v) Vdc(v) r=Vac/Vdc

USING
CRO

WITH FILTER

V1(V) V2(V) Vdc=(V Vac= r=

USINGCRO 1+V2)/2 (V1- Vac/
V2)/2√3 Vdc

PRECAUTIONS:

1. The primary and secondary sides of the transformer should be carefully

identified.
2. The polarities of the diode should be carefully identified.
3. While determining the % regulation, first Full load should be applied and then
it should be decremented in steps.

RESULT:-

a) The Ripple factor for the Half-Wave Rectifier with and without filters is
measured and the% regulation of the Half-Wave rectifier is calculated.

b) The ripple factor of the Full-wave rectifier (with filter and without filter) is calculated.

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VIVAQUESTIONS:-

HALF-WAVE RECTIFIER:
1. What is the PIV of Half wave rectifier?
2. What is the efficiency of half wave rectifier?
3. What is the rectifier?
4. What is the difference between the half wave rectifier and full wave
Rectifier?
5. What is the o/p frequency of Bridge Rectifier?
6. What are the ripples?
7. What is the function of the filters?
8. What is TUF?
9. What is the average value of o/p voltage for HWR?
10. What is the peak factor?

FULL-WAVE RECTIFIER:
1. Define regulation of the full wave rectifier?
2. Define peak in verse voltage(PIV)?And write its value for Full-wave
rectifier?
3. If one of the diode is changed in its polarities what wave form would you
get?
4. Does the process of rectification alter the frequency of the waveform?
5. What is ripple factor of the Full-wave rectifier?
6. What is the necessity of the transformer in the rectifier circuit?
7. What are the applications of a rectifier?
8. What is meant by ripple and define Ripple factor?
9. Explain how capacitor helps to improve the ripple factor?
10. Can a rectifier made in INDIA (V=230v, f=50Hz) be used in
USA(V=110v,f=60Hz)?

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 4. BJT CHARACTERISTICS (CECONFIGURATION)
AIM: To calculate the BJT Characteristics of transistor in CE configuration.
a. Input Characteristics
b. Output Characteristics

APPRATUS:
Transistor BC107

Resistors 100KΏ100 Ώ

Ammeter (0-200µA),(0-200mA)

Voltmeter (0-20V)-2Nos

Regulated Power Supply (0-30V,1A)-2Nos

Breadboard

THEORY:

INPUT CHARACTERISTICS:

The two sets of characteristics are necessary to describe the

behavior of the CE configuration one for input or base emitter circuit and other
for the output or collector emitter circuit.

In input characteristics the emitter base junction forward biased

by a very small voltage VBB where as collector base junction reverse biased by a
very large voltage VCC. The input characteristics are a plot of input current IBVs
the input voltage VBE for a range of values of output voltage VCE. The following
important points can be observed from these characteristics curves.

1. The characteristics resemble that of CE configuration.

2. Input resistance is high as IB increases less rapidly with VBE
3. The input resistance of the transistor is the ratio of change in base emitter
voltage ∆VBE to change in base current ∆IB at constant collector emitter
voltage (VCE) i.e... Input resistance or input impedance hie = ∆VBE / ∆IB at VCE
constant.

Dept of ECE, WISE

 OUTPU TCHARACTERISTICS:

A set of output characteristics or collector characteristics are a

plot of output current IC VS output voltage VCE for a range of values of input
current IB. The following important points can be observed from these
characteristics curves:-
1. The transistor always operates in the active region. I.e. the collector current IC
increases with VCE very slowly. For low values of the VCE the IC increases rapidly with a
small increase in VCE. The transistor is said to be working in saturation region.

2. Output resistance is the ratio of change of collector emitter voltage ∆V CE to

change in collector current ∆IC with constant IB. Output resistance or Output
impedance hoe=∆VCE/∆IC at IB constant.

Input Impedance hie = ∆VBE / ∆IB at VCE constant

Output impedance hoe=∆VCE/∆IC at IB constant

Reverse Transfer Voltage Gain hre=∆VBE/∆VCE at IB constant

Forward Transfer Current Gain hfe=∆IC/∆IB at constant VCE

CIRCUIT DIAGRAM:

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PROCEDURE:

1. Connect a transistor in CE configuration circuit for plotting its input and

output characteristics.
2. Take a set of readings for the variations in IB with VBE at different fixed
values of output voltage VCE.
3. Plot the input characteristics of CE configuration from the above readings.
4. From the graph calculate the input resistance hie and reverse transfer ratio
hre by taking the slopes of the curves.
5. Take the family of readings for the variations of IC with VCE at different
values of fixed IB.
6. Plot the output characteristics from the above readings.
7. From the graphs calculate hfe and shoe by taking the slope of the curves.

Tabular Forms

Input Characteristics

VCE=0V VCE=6V
S.NO
VBE(V) IB(µA) VBE(V) IB(µA)

Output Characteristics

IB= 20 µA IB= 40 µA IB= 60 µA

S.NO
VCE(V) IC(mA) VCE(V) IC(mA) VCE(V) IC(mA)

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MODELWAVEFORM:

Input Characteristics

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Output Characteristics

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RESULT: The BJT Characteristics of CE configuration are calculated from the

a) Input characteristics.

b) output characteristics.

1. Input Impedance hie=

2. Reverse Transfer Voltage Gain hre=
3. Forward Transfer Current Gain hfe=
4. Output conductance hoe=

VIVA QUESTIONS:
1. What is the range of for the transistor?
2. What are the input and output impedances of CE configuration?
3. Identify various regions in the output characteristics?
4. what is the relation between and 
5. Define current gain in CE configuration?
6. Why CE configuration is preferred for amplification?
7. What is the phase relation between input and output?
8. Draw diagram of CE configuration for PNP transistor?
9. What is the power gain of CE configuration?
10. What are the applications of CE configuration?

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 5. FETCHARACTERISTICS
AIM: a).To draw the drain and transfer characteristics of a given FET.
b).To find the drain resistance (rd) amplification factor (µ) and Trans
conductance (gm) of the given FET.

APPARATUS:

FET (BFW-11)
Regulated power supply
Voltmeter (0-20V)
Ammeter (0-100mA)
Breadboard
Connecting wires

THEORY:
A FET is a three terminal device, having the characteristics of high input
impedance and less noise, the Gate to Source junction of the FET s always
reverse biased. In response to small applied voltage from drain to source, the n-
type bar acts as sample resistor, and the drain current increases linearly with
VDS. With increase in ID the ohmic voltage drop between the source and the
channel region reverse biases the junction and the conducting position of the
channel begins to remain constant. The VDS at this instant is called “pinch of
voltage”.
If the gate to source voltage (VGS) is applied in the direction to
provide additional reverse bias, the pinch off voltage ill is decreased.
In amplifier application, the FET is always used in the region
beyond the pinch-off.
FDS= IDSS(1-VGS/VP)^2

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 CIRCUITDIAGRAM

PROCEDURE:
1. All the connections are made as per the circuit diagram.
2. To plot the drain characteristics, keep VGS constant 0V.
3. Vary the VDD and observe the values of VDS and ID.
4. Repeat the above steps 2, 3 for different values of VGS at 0.1V and 0.2V.
5. All the readings are tabulated.
6. To plot the transfer characteristics, keep VDS constant at1V.
7. Vary VGG and observe the values of VGS and ID.
8. Repeat steps 6 and 7 for different values of VDS at 1.5V and 2V.
9. The readings are tabulated.
10. From drain characteristics, calculate the values of dynamic resistance (rd) by
using the formula
rd=∆VDS/∆ID
11. From transfer characteristics, calculate the value of trans conductance (gm)
By using the formula
Gm=∆ID/∆VDS
12. Amplification factor (µ) = dynamic resistance. Trans conductance
µ=∆VDS/∆VGS

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OBSERVATIONS:

DRAIN CHARACTERISTICS:

S.NO VGS=0V VGS=0.1V VGS=0.2V

VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA)

TRANSFER CHARACTERISTICS:

S.NO VDS VDS=1V VDS

=0.5V =1.5V
VGS(V) ID(mA) VGS(V) ID(mA) VGS(V) ID(mA)

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MODEL GRAPH:

TRANSFER CHARACTERISTICS

DRAIN CHARACTERISTICS

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 PRECAUTIONS:

1. The three terminals of the FET must be carefully identified

2. Practically FET contains four terminals, which are called source, drain,
Gate, substrate.
3. Source and case should be short circuited.
4. Voltages exceeding the ratings of the FET should not be applied.

RESULT:

1. The drain and transfer characteristics of a given FET are drawn

2. The dynamic resistance (rd), amplification factor (µ) and
Trans conductance (gm) of the given FET are calculated.

VIVA QUESTIONS:
1. What are the advantages of FET?
2. Different between FET and BJT?
3. Explain different regions of V-I characteristics of FET?
4. What are the applications of FET?
5. What are the types of FET?
6. Draw the symbol of FET.
7. What are the disadvantages of FET?
8. What are the parameters of FET?

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 6. SILICON-CONTROLLED RECTIFIER (SCR) CHARACTERISTICS

AIM: To draw the V-I Characteristics of SCR

APPARATUS:
SCR (TYN616)
Regulated Power Supply (0-30V)
Resistors10kΩ, 1kΩ
Ammeter (0-50) µA
Voltmeter (0-10V)
Breadboard
Connecting Wires

CIRCUIT DIAGRAM:

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THEORY:

It is a four layer semiconductor device being alternate of P-type and N-type

silicon. It consists of 3 junctions J1, J2, J3 the J1 and J3 operate in forward
direction and J2 operates in reverse direction and three terminals called anode
A, cathode K, and a gate G. The operation of SCR can be studied when the gate
is open and when the gate is positive with respect to cathode.

When gate is open, no voltage is applied at the gate due to reverse

bias of the junction J2 no current flows through R2 and hence SCR is at cut off.
When anode voltage is increased J2 tends to breakdown.

When the gate positive, with respect to cathode J3 junction is forward

biased and J2 is reverse biased. Electrons from N-type material move across
junction J3 towards gate while holes from P-type material moves across
junctionJ3 towards cathode. So gate current starts flowing, anode current
increase is in extremely small current junction J2 break down and SCR conducts
heavily.

When gate is open the break over voltage is determined on the

minimum forward voltage at which SCR conducts heavily. Now most of the
supply voltage appears across the load resistance. The holding current is the
maximum anode current gate being open, when break over occurs.

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PROCEDURE:

1. Connections are made as per circuit diagram.

2. Keep the gate supply voltage at some constant value
3. Vary the anode to cathode supply voltage and note down the readings of
voltmeter and ammeter. Keep the gate voltage at standard value.
4. A graph is drawn between VAK and IAK.

OBSERVATION

VAK(V) IAK( µA)

MODEL WAVEFORM:

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RESULT: SCR Characteristics are observed.

VIVA QUESTIONS

1. What the symbol of SCR?

2. IN which state SCR turns of conducting state to blocking state?
3. What are the applications of SCR?
4. What is holding current?
5. What are the important type’s thyristors?
6. How many numbers of junctions are involved in SCR?
7. What is the function of gate in SCR?
8. When gate is open, what happens when anode voltage is increased?
9. What is the value of forward resistance offered by SCR?
10. What is the condition for making from conducting state to non conducting
state?

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 7. UJT CHARACTERISTICS

AIM: To observe the characteristics of UJT and to calculate the Intrinsic Stand-Off
Ratio (η).

APPARATUS:
Regulated Power Supply (0-30V)

Transistors-2NosUJT2N2646
Resistors10kΩ, 47Ω, 330Ω
Multimeters-2Nos
Breadboard

Connecting Wires

CIRCUI TDIAGRAM

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THEORY:

A Uni-junction Transistor (UJT) is an electronic semiconductor

device that has only one junction. The UJT Uni-junction Transistor (UJT) has
three terminals an emitter (E) and two bases (B1 and B2). The base is formed
by lightly doped n-type bar of silicon. Two ohmic contacts B1 and B2 are
attached at its ends. The emitter is of p-type and it is heavily doped. The
resistancebetweenB1andB2, when the emitter is open-circuit is called inter base
resistance. The original uni-junction transistor, or UJT, is a simple device that is
essentially a bar of N-type semi conductor material in to which P-type material
has been diffused somewhere along its length. The 2N2646 is the most
commonly used version of the UJT.

Circuit symbol

The UJT is biased with a positive voltage between the two bases. This causes a
potential drop along the length of the device. When the emitter voltage is driven
approximately one diode voltage above the voltage at the point where the P
diffusion (emitter) is, current will begin to flow from the emitter into the base
region. Because the base region is very lightly doped, the additional current
(actually charges in the base region) causes (conductivity modulation) which
reduces the resistance of the portion of the base between the emitter junction
and the B2 terminal. This reduction in resistance means that the emitter junction
is more forward biased, and so even more current is injected. Overall, the effect
is a negative resistance at the emitter terminal. This is what makes the UJT
useful, especially in simple oscillator circuits. When the emitter voltage reaches

Dept of ECE, WISE

Vp, the current starts to increase and the emitter voltage starts to decrease. This
is represented by negatives lope of the characteristics which is referred to as
the negative resistance region, beyond the valley point ,RB1 reaches minimum
value and this region, VEB proportional to IE.

PROCEDURE:

1. Connection is made as per circuit diagram.

2. Output voltage is fixed at a constant level and by varying input voltage
corresponding emitter current values are noted down.
3. This procedure is repeated for different values of output voltages.
4. All the readings are tabulated and Intrinsic Stand-Off ratio is calculated using
η=(Vp-VD)/VBB
5. A graph is plotted between VEE and IE for different values of VBE.

MODELGRAPH:

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OBSEVATIONS:

VBB=1V VBB=2V VBB=3V

VEB(V) IE(mA) VEB(V) IE(mA) VEB(V) IE(mA)

CALCULATIONS:

VP=ηVBB+ VD

η=(VP-VD)/VBB

η=(η1+η2+η3)/3

RESULT: The characteristics of UJT are observed and the values of Intrinsic
Stand-Off Ratio is calculated.
VIVAQ UESTIONS

1. What is the symbol of UJT?

2. Draw the equivalent circuit of UJT?
3. What are the applications of UJT?
4. Formula for the intrinsic stand-off ratio?
5. What does it indicates the direction of arrow in the UJT?
6. What is the difference between FET and UJT?
7. Is UJT is used an oscillator? Why?
8. What is the Resistance between B1 and B2is called as?
9. What is its value of resistance between B1 and B2?
10. Draw the characteristics of UJT?

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 8. BJT CE AMPLIFIER

AIM: 1.To Measure the voltage gain of a CE amplifier

2.To draw the frequency response curve of the CE amplifier

APPARATUS:

TransistorBC-107
Regulated power Supply (0-30V, 1A)
Function Generator
CRO
Resistors [33KΩ, 3.3KΩ, 330Ω, 1.5KΩ1KΩ, 2.2KΩ,4.7KΩ]
Capacitors-10µF-2No, 100µF
Bread Board
Connecting Wires

THEORY:
The CE amplifier provides high gain & wide frequency response.
The emitter lead is common to both input & output circuits and is grounded. The
emitter-base circuit is forward biased. The collector current is controlled by the
base current rather than emitter current. The input signal is applied to base
terminal of the transistor and amplifier output is taken across collector terminal.
A very small change in base current produces a much larger change in collector
current. When +VE half-cycle is fed to the input circuit, it opposes the forward
bias of the circuit which causes the collector current to decrease, it decreases
the voltage more –VE. Thus when input cycle varies through a -VE half-cycle,
increases the forward bias of the circuit, which causes the collector current to
increases thus the output signal is common emitter amplifier is in out of phase
with the input signal.

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CIRCUIT DIAGRAM:

PROCEDURE:

1. Connect the circuit as shown in circuit diagram

2. Apply the input of 20mV peak-to-peak and 1KHz frequency using Function
Generator
3. Measure the Output Voltage Vo (p-p)for various load resistors
4. Tabulate the readings in the tabular form.
5. The voltage gain can be calculated by using the expression Av=(V0/Vi)
6. For plotting the frequency response the input voltage is kept Constant at
20mV peak-to-peak and the frequency is varied from 100Hz to 1MHz Using
function generator
7. Note down the value of output voltage for each frequency.
8. All the readings are tabulated and voltage gain in dB is calculated by Using
The expression Av=20log10(V0/Vi)
9. A graph is drawn by taking frequency on x-axis and gain in dB on y-axis
On Semi-log graph.

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The band width of the amplifier is calculated from the graph using the expression,

Band width, BW=f2-f1

Where f1 lower cut-off frequency of CE amplifier,
andWheref2 uppercut-offfrequencyofCEamplifier
The bandwidth product of the amplifier is calculated using the Expression

Gain Band width product=3-dB mid band gain XB and width

OBSERVATIONS:

Input voltage Vi=20mV

LOAD OUTPUT GAIN GAIN IN dB

RESISTANCE(KΩ) VOLTAGE(V0) AV=(V0/Vi) Av=20log10
(V0/Vi)

FREQUENCY RESPONSE: Vi=20mv

FREQUENCY(Hz) OUTPUT GAIN IN dB
VOLTAGE(V0) Av=20log10(V0/Vi)

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MODEL WAVE FORMS:

INPUT WAVE FORM:

OUTPUT WAVE FORM

FREQUENCY RESPONSE

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RESULT: The voltage gain and frequency response of the CE amplifier are
obtained. Also gain band width product of the amplifier is calculated.

VIVAQUESTIONS:

1. What is phase difference between input and output waveforms of CE

amplifier?
2. What type of biasing is used in the given circuit?
3. If the given transistor is replaced by a p-n-p, can we get output or not?
4. What is effect of emitter-by pass capacitor on frequency response?
5. What is the effect of coupling capacitor?
6. What is region of the transistor so that it is operated as an amplifier?
7. How does transistor acts as an amplifier?
8. Draw the h-parameter model of CE amplifier?
9. What type of transistor configuration is used in intermediate stages of a
multistage amplifier?
10. What is early effect?

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 9. Emitter Follower- CCAMPLIFIER

AIM: 1.To measure the voltage gain of a CC amplifier

2.To draw the frequency response of the CC amplifier

APPRATUS:
TransistorBC107
Regulated Power Supply (0-30V)
Function Generator
CRO
Resistors -33KΩ, 3.3KΩ, 330Ω,1.5KΩ,1KΩ,2.2KΩ& 4.7KΩ
Capacitors 10µF -2Nos,100µF
Bread board
Connecting wires

THEORY:
In common-collector amplifier the input is given at the base and the
output is taken at the emitter. In this amplifier, there is no phase inversion
between input and output. The input impedance of the CC amplifier is very high
and output impedance is low. The voltage gain is less than unity. Here the
collector is at ac ground and the capacitors used must have an eligible
reactance at the frequency of operation.
This amplifier is used for impedance matching and as a buffer
amplifier. This circuit is also known as emitter follower.

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 CIRCUIT DIAGRAM:

PROCEDURE:
1. Connections are made as per the circuit diagram.
2. For calculating the voltage gain the input voltage of 20mV peak-to-peak and
1KHz frequency is applied and output voltage is taken for various load resistors.
3. The readings are tabulated.
The voltage gain calculated by using the expression, Av=V0/Vi
4. For plotting the frequency response the input voltage is kept constant a
20mV peak-to-peak and the frequency is varied from100Hzto1MHz.
5. Note down the values of output voltage for each frequency.
All the readings are tabulated the voltage gain in dB is calculated by using the
expression, Av= 20log10 (V0/Vi)
6. A graph is drawn by taking frequency on X-axis and gain in dB on y-axis on
Semi-log graph sheet.
The Band width of the amplifier is calculated from the graph using the
Expression,
Bandwidth BW=f2-f1
Where f1islower cut-off frequency of CE amplifier
f2 is upper cut-off frequency of CE amplifier

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7. The gain Bandwidth product of the amplifier is calculated using the Expression,
Gain-Bandwidth product=3-dB mid band gain X Bandwidth

OBSERVATIONS:

LOAD OUTPUT GAIN GAIN IN dB

RESISTANCE(KΩ) VOLTAGE(V0) Av=V0/Vi Av=20log10(V0/Vi)

FREQUENCY RESPONSE:

Vi=20mV

FREQUENCY(Hz) OUTPUT GAIN IN dB

VOLTAGE(V0) Av=20log10(V0/Vi)

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WAVEFORM:

PRECAUTIONS:

1. The input voltage must be kept constant while taking frequency response.
2. Proper biasing voltages should be applied.

RESULT:
The voltage gain and frequency response of the CC amplifier are
obtained. Also gain Bandwidth product is calculated.

Dept of ECE, WISE

VIVAQUESTIONS:

1. What are the applications of CC amplifier?

2. What is the voltage gain of CC amplifier?
3. What are the values of input and output impedances of the CC amplifier?
4. To which ground the collector terminal is connected in the circuit?
5. Identify the type of biasing used in the circuit?
6. Give the relation between α, β and γ.
7. Write the other name of CC amplifier?
8. What are the differences between CE, CB and CC?
9. When compared to CE, CC is not used for amplification. Justify your
answer?
10. What is the phase relationship between input and output in CC?

Dept of ECE, WISE

 10. FET-CS AMPLIFIER

AIM:1.To obtain the frequency response of the common source FET Amplifier
2. To find the Bandwidth.
APPRATUS:

N-channel FET (BFW11)

Resistors (6.8KΩ, 1MΩ, 1.5KΩ)
Capacitors (0.1µF, 47µF)
Regulated power Supply (0-30V)
Function generator
CRO
CRO probes
Bread board
Connecting wires

CIRCUIT DIAGRAM:

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THEORY:

A field-effect transistor (FET) is a type of transistor commonly used

for weak-signal amplification (for example, for amplifying wireless (signals). The
device can amplify analog or digital signals. It can also switch DC or function as
an oscillator. In the FET, current flows along a semi conductor path called the
channel. At one end of the channel, there is an electrode called the source. At
the other end of the channel, there is an electrode called the drain. The physical
diameter of the channel is fixed, but its effective electrical diameter can be
varied by the application of a voltage to a control electrode called the gate.
Field-effect transistors exist in two major classifications. These are known as
the junction FET (JFET) and the metal-oxide- semiconductor FET
(MOSFET).The junction FET has a channel consisting of N-type semiconductor
(N-channel) or P-type semiconductor (P-channel) material; the gate is made of
the opposite semiconductor type. In P-type material, electric charges are carried
mainly in the form of electron deficiencies called holes. In N-type material, the
charge carriers are primarily electrons. In a JFET, the junction is the boundary
between the channel and the gate. Normally, this P-N junction is reverse-biased
(a DC voltage is applied to it) so that no current flows between the channel and
the gate. However, under some conditions there is a small current through the
junction during part of the input signal cycle. The FET has some advantages
and some disadvantages relative to the bipolar transistor. Field-effect transistors
are preferred for weak-signal work, for example in wireless, communications
and broadcast receivers. They are also preferred in circuits and systems
requiring high impedance. The FET is not, in general, used for high-power
amplification, such as is required in large wireless communications and
broadcast transmitters.

Field-effect transistors are fabricated onto silicon integrated circuit (IC) chips. A
single IC can contain many thousands of FETs, along with other components
such as resistors, capacitors, and diodes.

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PROCEDURE:
1. Connections are made as per the circuit diagram.
2. A signal of 1KHz frequency and 50mV peak-to-peak is applied at the
Input of amplifier.
3. Output is taken at drain and gain is calculated by using the expression,
Av=V0/Vi

4. Voltage gain in dB is calculated by using the expression,

Av=20log10(V0/Vi)
5. Repeat the above steps for various input voltages.
6. Plot Av vs .Frequency

7. The Bandwidth of the amplifier is calculated from the graph using the
Expression,
Bandwidth BW=f2-f1
Where f1 is lower 3dB frequency
f2is upper 3dB frequency

OBSERVATIONS:

S.NO INPUT OUTPUT VOLTAGE

VOLTAGE(Vi) VOLTAGE(V GAIN
0) Av= (V0/Vi)

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MODEL GRAPH:

PRECAUTIONS:

1. All the connections should be tight.

2. Transistor terminals must be identified properly
.
RESULT: The frequency response of the common source FET
Amplifier and Bandwidth is obtained.

Dept of ECE, WISE

VIVA QUESTIONS
1. What is the difference between FET and BJT?
2. FET is unipolar or bipolar?
3. Draw the symbol of FET?
4. What are the applications of FET?
5. FET is voltage controlled or current controlled?
6. Draw the equivalent circuit of common source FET amplifier?
7. What is the voltage gain of the FET amplifier?
8. What is the input impedance of FET amplifier?
9. What is the output impedance of FET amplifier?
10. What are the FET parameters?
11. What are the FET applications?

Dept of ECE, WISE

11. CRO OPERATION AND ITS MEASUREMENTS

AIM: To observe front panel control knobs and to find amplitude, time period and
frequency for given waveforms and also find phase by using the lissajous figures.

APPARATUS:
Cathode Ray Oscilloscope,
Function generator,
Connecting wires

THEORY:

C.R.O is a versatile instrument used for display of wave forms and is a fast x-y
plotter. The heart of C.R.O is and the rest is the circuitry to operate C.R.O
The main parts are

1. Electron gun: - it is used to produce sharply focused beam of electron

accelerated to very high velocity.

2. Deflection system: - it deflects the electron both in horizontal and vertical plan.

3. Florescent screen:- the screen which produces, spot of visible light .when beam
of electrons are incident on it the other side of tube is coated with phosphorus
material.

FRONT PANNEL:

ON-POWER: toggle switch for switching on power.

INTENCITY: controls trace intensity from zero to maximum

.
FOCUS: It controls sharpness of trace a slight adjustment of focus is done after
changing intensity of trace

AC-DC: GROUND:
It selects coupling of AC-DC ground signal to vertical amplifier.
X-MAG: It expands length of time base from 1-5 times continuously and to
maximum time base to 40ns/cm.

SQUARE:
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This provides square wave 2v (p-P) amplitude and enables to check y calibration of
scope.

SAWTOOTH WAVE FORM:

This provides saw tooth wave form output coincident to sweep speed with an
output of sawtooth wave (p-p)

VERTICAL SECTION:

Y position:
This enables movement of display along y-axis
.
Y-INPUT: It connects input signal to vertical amplifier through AC-DC ground
coupling switch

CALIBRATION: 15mv – 150mv dc signal depending on position selection is applied

to vertical amplifier.
DC BALANCE: It is control on panel electrostatic ally in accordance with
waveforms to be displayed.

VOLTS/CM: Switch adjusts sensitivity.

HORIZANTAL SECTION:
X-POSITION: This control enables movement of display along x-axis.

TRIGGERING LEVEL: It selects mode of triggering.

TIMEBASE: This controls or selects sweep speeds.

VERNUIS: This control the fine adjustments associated with time base sweep.

SIGN SELECTOR: It selects different options of INT/EXT, NORM/TO.

STAB: Present on panel

EXITCAD: It allows time base range to be extended.

HORIZANTAL INPUT: It connects external signal to horizontal amplifier.

Ext SYN: it connects external signal to trigger circuit for synchronization.

OBSERVATIONS:-

Amplitude = no. of vertical divisions * Volts/div.

Time period = no. of horizontal divisions * Time/div.
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Frequency=1/T
Amplitude taken on vertical section (y)
Time period taken on horizontal section(x)

MODEL WAVE FORMS:

MESURMENT OF PHASE:

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RESULT: To calculated the given waveform, frequency, amplitude and phase.

VIVAQUESTIONS

1. How is the waveform adjusted?

2. By making use of a CRO?

3. How is error in measurement reduced?

4. How is frequency related to time period?

5. Period of a waveform is obtained by which of the following relation

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