UNIT-2
ARM Programming
• Introduction to the ARM assembly programming
• Architectural support for high level languages
Architectural support for high level
Introduction to the ARM assembly languages:
programming: • Abstraction in software design,
• Structure of assembly module, • data types,
• Directives, • use of memory,
• Data processing instructions, • run time environment,
• Data transfer instructions, • Expressions,
• Control flow instructions, • Conditional statements,
• Writing basic assembly language • Loops,
programs. • Functions and procedures,
• Programming examples using
embedded C.
Addressing Modes
Addressing mode
defines the way of
identifying the
address of the
operand/s in an
instruction.
It's the method
used by the
processor to locate
the data it needs to
operate on.
Instruction Set
1. Data Processing Instructions
2. Data Transfer Instructions
3. Control Flow Instructions
Instruction Set
Instruction Set contd..
CPSR(Current program status register)
Dr. SURESH KURI, GIT BELAGAVI 7
Barrel Shifter ARM Programmer Model
Barrel Shifter
Instructions
1. Data Transfer Instructions
i. MOVE Instruction
4. Stack Operation Instructions
ii. Arithmetic Instructions 5. SWAP Instruction
iii. Logical Instructions 6. Software Interrupt Instruction
iv. Comparison Instructions 7. Program Status Register Instructions
v. Multiply Instructions
2. Branch Instructions
3. Load-Store Instructions
i. Single Register Transfer Instructions
ii. Single Register Transfers Addressing Modes
iii. Multiple Register Transfer Instructions
1. Data Processing Instructions
• Register Movement Operations (Register Operands)
MOV r0,r1 ; r0=r1
MVN r0,r1 ; r0= not (r1)
MVN → move negated
Arithmetic Instructions
• Arithmetic Operations
(Register Operands)
ADD r0,r1,r2 ; r0=r1+r2
ADC r0,r1,r2 ; r0=r1+r2
SUB r0,r1,r2 ; r0=r1-r2
SBC r0,r1,r2 ; r0=r1-r2+C-1
RSB r0,r1,r2 ; r0=r2-r1
RSC r0,r1,r2 ; r0=r2-r1+C-1
Logical Instructions
• Bitwise Logical Operations
(Register Operands)
AND r0,r1,r2 ; r0=r1 and r2
ORR r0,r1,r2 ; r0=r1 or r2
EOR r0,r1,r2 ; r0=r1 xor r2
BIC r0,r1,r2 ; r0=r1 and (not r2)
Bit-clear: Every 1 in second
operand clears the corresponding
bit in the first operand.
Comparison Instructions
• Comparison Operations
(Register Operands)
CMP r1,r2 ; set cc on r1-r2
CMN r1,r2 ; set cc on r1+r2
TST r1,r2 ; set cc on r1 and r2
TEQ r1,r2 ; set cc on r1 xor r2
Multiply Instructions
3. Branch Instructions
Single Register Transfer Instructions
Load-Store Multiple Instructions
Stack instructions