MOSFET

MOSFET stands for Metal Oxide Semiconductor Field Effect Transistor. It is a

type of Field Effect Transistor and it is voltage controlled device. It is also
called as Insulated Gate Field Effect Transistor (IGFET).
Uses:
 Switching or amplifying electronic signals in the electronic devices.
 Used in both analog and digital circuits.

 In the Enhancement MOSFET the source and the drain are not
connected physically so in the symbol lines are broken
 In the Depletion mode line is continuous. In the N type the arrow points
inside and in the P type arrow points outside.
Construction of N channel and P channel Enhancement MOSFET
The metallic gate terminal in the MOSFET is insulated from the semiconductor
layer by a SiO2 layer or dielectric layer. The MOSFET consists of three
terminals, they are source(S), Gate (G), Drain (D) and the body which is called

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as substrate. The substrate is connected to the source internally.

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Construction of N channel and P channel Depletion MOSFET:

In the N Channel depletion MOSFET a small strip of semiconductor of N type

connects the source and drain. The source and drain are of N type
semiconductor and the Substrate is of P type semiconductor. Majority charge
carriers are electrons. The source and drain are heavily doped.
In the P Channel depletion MOSFET a small strip of semiconductor of P type
connects the source and drain. The source and drain are of P type
semiconductor and the Substrate is of N type semiconductor. Majority charge
carriers are holes.
(i)Working of Enhancement MOSFET:

Working of N channel Enhancement MOSFET

In the enhancement mode the applied Gate voltage is always positive. When it
crosses the threshold voltage it turns ON. The current is generated due to the

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movement of majority carriers. In N channel majority carriers are electrons and
in P channel majority carriers are holes. The source is connected to the
negative terminal. When the electrons move from source to drain the positive
charges formed below the dielectric because of the repulsive force from gate
combine with each other.

When the applied gate voltage is increased the number of majority carriers
becomes more than the minority carriers below the dielectric medium. So the
majority carriers overcomes the recombination of holes and electrons and the
majority carrier move from source to drain in the channel, which forms the
current. Thus the gate voltage controls the concentration of the majority
carriers which is responsible for the formation of the channel.

(ii)Working of Depletion MOSFET:

Working of N channel Depletion MOSFET

The depletion MOSFET is ON by default. The source and drain terminals are
physically connected. When the gate terminal is connected to the negative
terminal and source to the positive terminal, the electrons gets repelled below
the dielectric layer. The positive charged carrier from the source gets
combined with the majority carrier the electrons in the N type and thus
depletion layer is formed and the channel resistance increases and the current
flow decreases. Thus the increase in gate voltage decreases the drain current.
They are inversely proportional. When the negative voltage is further
increased it reaches the pinch off mode.

When the gate is connected to the positive terminal and the source terminal it
operates in the enhancement mode.

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V-I Characteristics of MOSFET:

V-I Characteristics of MOSFET

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 Cut off region:
No current flows through it and the MOSFET is off.
Ohmic region:
Drain current increases when the drain source voltage increases. Used as
amplifier in this region.
Saturation region:
Drain current is constant for drain source voltage. Used as switch in this
region. This occurs when the drain source voltage reaches pinch off voltage.
Depletion mode:
The MOSFET is ON by default. When negative voltage is applied to the gate
terminal it operates in the depletion mode and when positive voltage is
applied, it operates in the enhancement mode.
Enhancement mode:
When positive voltage is applied to the gate terminal, it starts conducting and
the current starts to flow.

Pros:
 High Switching Speed
 Low On-Resistance
 High Input Impedance
 Simple Drive Circuitry
 Low Power Consumption
 Noise Immunity

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 Cons:
 Cost high
 Switching Losses
 Susceptibility to Damage.
 Limited Voltage and Current Capabilities

Applications:
 Switching Regulators.
 Motor Control
 Amplifiers
 Digital Logic Circuits
 Power Electronics
 Radio-Frequency Amplifiers
 Sensors

MOS Capacitor:
The acronym MOS stands for metal–oxide–semiconductor. An MOS capacitor
is made of a semiconductor body or substrate, an insulator film, suchas SiO2,
and a metal electrode called a gate.

An MOS transistor is an MOS capacitor with PN junctions at two ends

MOS capacitor biased into inversion:

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The inversion layer may bevisualized as a very thin N layer (hence the term
inversion of the surface conductivity type.(a) The surface inversion behavior is
best studied with a PN junction buttingthe MOS capacitor to supply the
inversion charge. (b) The inversion layer may be thought ofas a thin N-type
layer.
The capacitance–voltage (C–V) measurement is a powerful and commonly
used method of determining the gate oxide thickness, substrate doping
concentration, threshold voltage, and flat-band voltage.
Threshold Voltage: Threshold voltage is defined as the crucial voltage level in
a MOSFET that marks the transition from the subthreshold region to the strong
inversion region. It is determined experimentally by measuring the drain
current for various gate voltages in the linear regime. The threshold voltage
(Vth) of a MOSFET is the minimum gate-to-source voltage (VGS) that is needed
to create a conducting path between the source and drain terminals.

The linear threshold voltage is one of the most important MOSFET parameters.
It signifies the turn-on point and separates the sub threshold region from the
strong inversion region. Since it depends on Vfb, threshold voltage can also be
used to monitor oxide charges. Experimentally, the threshold voltage is
determined by measuring the drain current for various values of gate voltage
in the linear regime (i.e., at low Vds values).
It is influenced by a range of factors, including temperature fluctuations,
device size, and variations in manufacturing processes.
PARAMETERS OF THE FET:

FETs have several key parameters and associated equations that describe
their behavior. These include parameters like drain current (ID), gate-to-source
voltage (VGS), drain-to-source voltage (VDS), threshold voltage (VT), and
parameters like drain resistance (rd) and transconductance (gm). The threshold
voltage (Vth) of a MOSFET is the minimum gate-to-source voltage (VGS) that is
needed to create a conducting path between the source and drain terminals.

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(i)Fixed-Bias Configuration

(ii)Voltage-Divider Bias Configuration

B)Small-Signal Operation and Models , MOSFET Configurations and

Biasing- Second order effects
Small-signal models, like the hybrid-pi or two-port network models, provide a
simplified representation of the FET's behavior for this purpose, allowing for
linear circuit analysis.

Voltage-Controlled Current Source:

In the active region, the FET can be modeled as a voltage-controlled current

source, where the drain current is proportional to the gate-source voltage.
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  The arrow points from drain to source to indicate a phase change of
180° (or phase reversal) between output and input voltages as will occur
in actual operation.
 In low frequency model, as the gate is reverse biased, the gate current
becomes zero. So, in low frequency model, gate to source junction is
represented by an open circuit and no current is drawn by the input
terminal of the FET.
 The reason is that input resistance, (gate-to-source resistance) is very
large. The output resistance is represented by the resistance rd
(resistance from drain to source).

The three types of MOSFET transistor amplifier configurations: common-

source, common-gate, and common-drain (often called the source follower).
Each of these configurations exhibit certain characteristics that make them
more desirable in certain circuit applications than the others.

Problems:

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1.Suppose an n-channel depletion-mode JFET has of IDSS = 7 mA and (VGS(OFF)
or Vp ) = -3V. Calculate the drain current (ID) for a gate-source voltage at (-1V)?

Example (2): Fig. (2) shows an n-channel JFET circuit, fined the drain-source voltage
(VDS), when (VGG or VGS = 0). It is given that IDSS = 10 mA and (VP or VGS(OFF)
= - 4 V) ?

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