Computer System

Organization
Course Code: INITCO7
Semester: 3
Section: ITNS, 1
 UNIT 4:
INPUT-OUTPUT
ORGANIZATION
Peripheral Devices
• The input-output subsystem of a computer, referred to as I/O, provides
an efficient mode of communication between the central system and
the outside environment.
• Programs and data must be entered into computer memory for
processing and results obtained from computations must be recorded
or displayed for the user.
• The most familiar means of entering information into a computer is
through a typewriter-like keyboard that allows a person to enter
alphanumeric information directly.
• Every time a key is depressed, the terminal sends a binary coded
character to the computer.
• Devices that are under the direct control of the computer are said to be
connected on-line.
• These devices are designed to read information into or out of the
memory unit upon command from the CPU and are considered to be
part of the total computer system.
• Input or output devices attached to the computer are also called
peripherals .
• Peripherals that provide auxiliary storage for the system are magnetic
disks and tapes.
• Video monitors are the most commonly used peripherals.
• They consist of a keyboard as the input device and a display unit as the
output device.
• There are different types of video monitors, but the most popular use a
cathode ray tube (CRT).
• Printers provide a permanent record on paper of computer output data
or text.
• There are three basic types of character printers: daisywheel, dot
matrix, and laser printers.
• The daisywheel printer contains a wheel with the characters placed
along the circumference.
• The dot matrix printer contains a set of dots along the printing
mechanism.
• The laser printer uses a rotating photographic drum that is used to
imprint the character images.
• The pattern is then transferred onto paper in the same manner as a
copying machine.
• Magnetic tapes are used mostly for storing files of data: for example, a
company's payroll record.
• Access is sequential and consists of records that can be accessed one
after another as the tape moves along a stationary read-write
mechanism.
• It is one of the cheapest and slowest methods for storage and has the
advantage that tapes can be removed when not in use.
• Magnetic disks have high-speed rotational surfaces coated with
magnetic material.
• Access is achieved by moving a read-write mechanism to a track in the
magnetized surface.
• Disks are used mostly for bulk storage of programs and data.
ASCII Alphanumeric Characters
• Input and output devices that communicate with people and the
computer are usually involved in the transfer of alphanumeric
information to and from the device and the computer.
• The standard binary code for the alphanumeric characters is ASCII
(American Standard Code for Information Interchange).
• It uses seven bits to code 128 characters.
• The control characters are used for routing data and arranging the
printed text into a prescribed format.
• There are three types of control characters: format effectors,
information separators, and communication control characters.
• Format effectors are characters that control the layout of printing.
• Information separators are used to separate the data into divisions like
paragraphs and pages.
• The communication control characters are useful during the
transmission of text between remote terminals.
Input-Output Interface
• The major differences are:
1. Peripherals are electromechanical and electromagnetic devices
and their manner of operation is different from the operation of
the CPU and memory, which are electronic devices. Therefore, a
conversion of signal values may be required.
2. The data transfer rate of peripherals is usually slower than the
transfer rate of the CPU, and consequently, a synchronization
mechanism may be needed.
 3. Data codes and formats in peripherals differ from the word
format in the CPU and memory.
4. The operating modes of peripherals are different from each
other and each must be controlled so as not to disturb the
operation of other peripherals connected to the CPU.
• To resolve these differences, computer systems include special
hardware components between the CPU and peripherals to supervise
and synchronize all input and output transfers.
• These components are called interface units because they interface
between the processor bus and the peripheral device.
I/O Bus and Interface Modules
I/O Command
• The function code is referred to as an I/O command and is in essence
an instruction that is executed in the interface and its attached
peripheral unit.
• The interpretation of the command depends on the peripheral that the
processor is addressing.
• There are four types of commands that an interface may receive.
• They are classified as control, status, data output, and data input.
I/O versus Memory Bus
• There are three ways that computer buses can be used to communicate
with memory and I/O:
1. Use two separate buses, one for memory and the other for VO.
2. Use one common bus for both memory and VO but have
separate control lines for each.
3. Use one common bus for memory and VO with common
control lines.
Isolated versus Memory-Mapped I/O
• In the isolated I/O configuration, the CPU has distinct input and output
instructions, and each of these instructions is associated with the
address of an interface register.
• When the CPU fetches and decodes the operation code of an input or
output instruction, it places the address associated with the instruction
into the common address lines.
• At the same time, it enables the I/O read (for input) or 110 write (for
output) control line.
• This informs the external components that are attached to the common
bus that the address in the address lines is for an interface register and
not for a memory word.
• On the other hand, when the CPU is fetching an instruction or an
operand from memory, it places the memory address on the address
lines and enables the memory read or memory write control line.
• This informs the external components that the address is for a memory
word and not for an I/O interface.
Asynchronous Data Transfer
• The internal operations in a digital system are synchronized by means
of clock pulses supplied by a common pulse generator.
• Clock pulses are applied to all registers within a unit and all data
transfers among internal registers occur simultaneously during the
occurrence of a clock pulse.
• If the registers in the interface share a common clock with the CPU
registers, the transfer between the two units is said to be synchronous.
• The internal timing in each unit is independent from the other in that
each uses its own private clock for internal registers.
• In that case, the two units are said to be asynchronous to each other.
• A strobe pulse supplied by one of the units to indicate to the other unit
when the transfer has to occur.
• Another method commonly used is to accompany each data item being
transferred with a control signal that indicates the presence of data in
the bus.
• The unit receiving the data item responds with another control signal
to acknowledge receipt of the data.
• This type of agreement between two independent units is referred to as
handshaking .
Strobe Control
Handshaking

• The disadvantage of the strobe method is that the source unit that
initiates the transfer has no way of knowing whether the destination
unit has actually received the data item that was placed in the bus.
• Similarly, a destination unit that initiates the transfer has no way of
knowing whether the source unit has actually placed the data on the
bus.
• The handshaking scheme provides a high degree of flexibility and
reliability because the successful completion of a data transfer relies
on active participation by both units.
• If one unit is faulty, the data transfer will not be timeout completed.
• Such an error can be detected by means of a timeout mechanism,
which produces an alarm if the data transfer is not completed within a
predetermined time.
Asynchronous Serial Transfer
• Serial transmission can be synchronous or asynchronous.
• In synchronous transmission, the two units share a common clock
frequency and bits are transmitted continuously at the rate dictated by
the clock pulses.
• In long distant serial transmission, each unit is driven by a separate
clock of the same frequency.
• Synchronization signals are transmitted periodically between the two
units to keep their clocks in step with each other.
• In asynchronous transmission, binary information is sent only when it
is available and the line remains idle when there is no information to
be transmitted.
• A transmitted character can be detected by the receiver from
knowledge of the transmission rules:
1 . When a character is not being sent, the line is kept in the 1-
state.
2. The initiation of a character transmission is detected from the
start bit, which is always 0.
3. The character bits always follow the start bit.
4. After the last bit of the character is transmitted, a stop bit is
detected when the line returns to the 1-state for at least one bit
time.
Asynchronous Communication Interface
Modes of Transfer
• Data transfer to and from peripherals may be handled in one of three
possible modes:
1. Programmed I/O
2. Interrupt-initiated I/O
3. Direct memory access (DMA)
Programmed I/O

• Programmed I/O operations are the result of I/O instructions written in

the computer program.
• Each data item transfer is initiated by an instruction in the program.
• Usually, the transfer is to and from a CPU register and peripheral.
• Other instructions are needed to transfer the data to and from CPU and
memory.
Interrupt
• In the programmed I/O method, the CPU stays in a program loop until the I/O
unit indicates that it is ready for data transfer.
• It can be avoided by using an interrupt facility and special commands to
inform the interface to issue an interrupt request signal when the data are
available from the device.
• In the meantime the CPU can proceed to execute another program.
• The interface meanwhile keeps monitoring the device.
• When the interface determines that the device is ready for data transfer, it
generates an interrupt request to the computer.
• Upon detecting the external interrupt signal, the CPU momentarily stops the
task it is processing, branches to a service program to process the I/O
transfer, and then returns to the task it was originally performing.
DMA

• In direct memory access (DMA), the interface transfers data into and
out of the memory unit through the memory bus.
• The CPU initiates the transfer by supplying the interface with the
starting address and the number of words needed to be transferred and
then proceeds to execute other tasks.
• When the transfer is made, the DMA requests memory cycles through
the memory bus.
• When the request is granted by the memory controller, the DMA
transfers the data directly into memory.
IOP

• Many computers combine the interface logic with the requirements for
direct memory access into one unit and call it an I/O processor (IOP).
• The transfer of each byte requires three instructions:
1. Read the status register.
2. Check the status of the flag bit and branch to step 1 if not set or
to step 3 if set.
3. Read the data register.
 Interrupt-Initiated I/O
• The way that the processor chooses the branch address of the service
routine varies from one unit to another.
• In principle, there are two methods for accomplishing this. One is called
vectored interrupt and the other, nonvectored interrupt.
• In a non vectored interrupt, the branch address is assigned to a fixed
location in memory.
• In a vectored interrupt, the source that interrupts supplies the branch
information to the computer. This information is called the interrupt vector.
• In some computers the interrupt vector is the first address of the I/O service
routine. In other computers the interrupt vector is an address that points to a
location in memory where the beginning address of the I/O service routine
is stored.
Priority Interrupt
• A priority interrupt is a system that establishes a priority over the
various sources to determine which condition is to be serviced first
when two or more requests arrive simultaneously.
• The system may also determine which conditions are permitted to
interrupt the computer while another interrupt is being serviced.
• Higher-priority interrupt levels are assigned to requests which, if
delayed or interrupted, could have serious consequences.
 Polling
• Establishing the priority of simultaneous interrupts can be done by
software or hardware.
• A polling procedure is used to identify the highest-priority source by
software means.
• In this method there is one common branch address for all interrupts.
• The program that takes care of interrupts begins at the branch address
and polls the interrupt sources in sequence.
• The order in which they are tested determines the priority of each
interrupt.
• The highest-priority source is tested first, and if its interrupt signal is
on, control branches to a service routine for this source.
• Otherwise, the next-lower-priority source is tested, and so on.
Daisy-Chaining Priority
• The daisy-chaining method of establishing priority consists of a serial
connection of all devices that request an interrupt.
• The device with the highest priority is placed in the first position,
followed by lower-priority devices up to the device with the lowest
priority, which is placed last in the chain.
Direct Memory Access (DMA)
CPU-lOP Communication