Unit 3

Characteristics Of opamp

Ideal op-amp characteristics:

1. Infinite voltage gain A.
2. Infinite input resistance Ri, so that almost any signal source can drive it and there is no loading of the
proceeding stage.
3. Zero output resistance Ro, so that the output can drive an infinite number of other devices.
4. Zero output voltage, when input voltage is zero.
5. Infinite bandwidth, so that any frequency signals from o to ∞ HZ can be amplified with out attenuation.
6. Infinite common mode rejection ratio, so that the output common mode noise voltage is zero.
7. Infinite slew rate, so that output voltage changes occur simultaneously with input voltage changes.

DC Characteristics of op-amp:
DC Characteristics of op-amp:
Current is taken from the source into the op-amp inputs respond differently to current and voltage
due to mismatch in transistor.
DC output voltages are,
1. Input bias current
2. Input offset current
3. Input offset voltage
4. Thermal drift
Input bias current:
The op-amp‘s input is differential amplifier, which may be made of BJT or FET.
➢ In an ideal op-amp, we assumed that no current is drawn from the input terminals.
➢ The base currents entering into the inverting and non-inverting terminals (IB- & IB+
respectively)
➢ Even though both the transistors are identical, IB- and IB+ are not exactly equal due to
internal imbalance between the two inputs.
➢ Manufacturers specify the input bias current IB

If input voltage Vi = 0V. The output Voltage Vo should also be (Vo = 0)

 IB = 500nA
Op-amp with a 1M feedback resistor
Vo = 5000nA X 1M = 500mV
The output is driven to 500mV with zero input, because of the bias currents.
In application where the signal levels are measured in mV, this is totally unacceptable. This can
be compensated. Where a compensation resistor Rcomp has been added between the non-
inverting input terminal and ground as shown in the figure below

Current IB+ flowing through the compensating resistor Rcomp, then by KVL we get,
-V1+0+V2-Vo = 0 (or)
Vo = V2 – V1 ——> (3)
By selecting proper value of Rcomp, V2 can be cancelled with V1 and the Vo = 0. The value of
Rcomp is derived a
V1 = IB+Rcomp (or)
IB+ = V1/Rcomp ——> (4)
The node ‗a‘ is at voltage (-V1). Because the voltage at the non-inverting input terminal is (-V1).
So with Vi = 0 we get,
I1 = V1/R1 ——>(5)
I2 = V2/Rf ——>(6)
For compensation, Vo should equal to zero (Vo = 0, Vi = 0). i.e. from equation (3) V2 = V1. So
that,
I2 = V1/Rf ——>(7)
Input offset current:
➢ Bias current compensation will work if both bias currents IB+ and IB- are equal.
➢ Since the input transistor cannot be made identical. There will always be some small
difference between IB+ and IB-. This difference is called the offset current
|Ios| = IB+ - IB- ——>(8)
Offset current Ios for BJT op-amp is 200nA and for FET op-amp is 10pA. Even with bias current
compensation, offset current will produce an output voltage when Vi = 0.
V1 = IB+ Rcomp ——>(9)
And I1 = V1/R1 ——>(10)
KCL at node ‗a‘ gives,
I2 = (IB—I1)
Again
V0 = I2 Rf – V1
Vo = I2 Rf – IB+ Rcomp
Substitute equation (9) and after algebraic manipulation, So even with bias current compensation
and with feedback resistor of 1M, a BJT op-amp has an output offset voltage
Vo = 1M Ω X 200nA
 Vo = 200mV with Vi = 0
The offset current can be minimized by keeping feedback resistance small.
➢ Unfortunately to obtain high input impedance, R1 must be kept large.
➢ R1 large, the feedback resistor Rf must also be high. So as to obtain reasonable gain, the T-
feedback network is a good solution. This will allow large feedback resistance, while
keeping the resistance to ground low (in dotted line).
➢ The T-network provides a feedback signal as if the network were a single feedback
resistor.By T to Π conversion, to design T- network first pick Rt<<Rf/2

Input offset voltage:

Inspite of the use of the above compensating techniques, it is found that the output
voltage may still not be zero with zero input voltage [Vo ≠ 0 with Vi = 0]. This is due to
unavoidable imbalances inside the op-amp and one may have to apply a small voltage at the input
terminal to make output (Vo) = 0. This voltage is called input offset voltage Vos. This is the
voltage required to be applied at the input for making output voltage to zero (Vo = 0).
Let us determine the Vos on the output of inverting and non-inverting amplifier. If Vi = 0
(Fig (b) and (c)) become the same as in figure (d).
Thus, the output offset voltage of an op-amp in closed loop is given by above equation
 Total output offset voltage:
The total output offset voltage VOT could be either more or less than the offset voltage
produced at the output due to input bias current (IB) or input offset voltage alone(Vos). This is
because IB and Vos could be either positive or negative with respect to ground. Therefore the
maximum offset voltage at the output of an inverting and non-inverting amplifier (figure b, c)
without any compensation technique used is given by many op-amp provide offset compensation
pins to nullify the offset voltage.
➢ 10K potentiometer is placed across offset null pins 1&5. The wipes connected to the negative
supply at pin 4.
➢ The position of the wipes is adjusted to nullify the offset voltage.

Thermal drift:
➢ Bias current, offset current, and offset voltage change with temperature.
➢ A circuit carefully nulled at 25ºC may not remain. So when the temperature rises to 35ºC.
This is called drift.
➢ Offset current drift is expressed in nA/ºC.
➢ These indicate the change in offset for each degree Celsius change in temperature.
AC Characteristics:
Frequency compensation in Op-Amp IC’s.
Frequency compensation is implemented by modifying the gain and phase characteristics of the
amplifier's open loop output or of its feedback network, or both, in such a way as to avoid the
conditions leading to oscillation. This is usually done by the internal or external use of resistance-
capacitance networks.
Dominant-pole compensation
The method most commonly used is called dominant-pole compensation, which is a form of lag
compensation. A pole placed at an appropriate low frequency in the open-loop response reduces the
gain of the amplifier to one (0 dB) for a frequency at or just below the location of the next highest
frequency pole. The lowest frequency pole is called the dominant pole because it dominates the
effect of all of the higher frequency poles. The result is that the difference between the open loop
output phase and the phase response of a feedback network having no reactive elements never falls
below −180° while the amplifier has a gain of one or more, ensuring stability.
Dominant-pole compensation can be implemented for general purpose operational amplifiers by
adding an integrating capacitance to the stage that provides the bulk of the amplifier's gain. This
capacitor creates a pole that is set at a frequency low enough to reduce the gain to one (0 dB) at or
just below the frequency where the pole next highest in frequency is located. The result is a phase
margin of ≈ 45°, depending on the proximity of still higher poles. This margin is sufficient to prevent
oscillation in the most commonly used feedback configurations. In addition, dominant-pole
compensation allows control of overshoot and ringing in the amplifier step response, which can be a
more demanding requirement than the simple need for stability.
Though simple and effective, this kind of conservative dominant pole compensation has two
drawbacks:
1. It reduces the bandwidth of the amplifier, thereby reducing available open loop gain at higher
frequencies. This, in turn, reduces the amount of feedback available for distortion correction, etc. at
higher frequencies.
 2. It reduces the amplifier's slew rate. This reduction results from the time it takes the finite current
driving the compensated stage to charge the compensating capacitor. The result is the inability of the
amplifier to reproduce high amplitude, rapidly changing signals accurately.
Often, the implementation of dominant-pole compensation results in the phenomenon of Pole
splitting. This results in the lowest frequency pole of the uncompensated amplifier "moving" to an
even lower frequency to become the dominant pole, and the higher-frequency pole of the
uncompensated amplifier "moving" to a higher frequency.
Other methods
Some other compensation methods are: lead compensation, lead–lag compensation and feed-forward
compensation.
Lead compensation. Whereas dominant pole compensation places or moves poles in the open loop
response, lead compensation places a zero in the open loop response to cancel one of the existing
poles.
Lead–lag compensation places both a zero and a pole in the open loop response, with the pole usually
being at an open loop gain of less than one.
Feed-forward compensation uses a capacitor to bypass a stage in the amplifier at high frequencies,
thereby eliminating the pole that stage creates.
The purpose of these three methods is to allow greater open loop bandwidth while still maintaining
amplifier closed loop stability. They are often used to compensate high gain, wide bandwidth
amplifiers.

Slew Rate:
Another important frequency related parameter of an op-amp is the slew rate. (Slew rate is the
maximum rate of change of output voltage with respect to time. Specified in V/μs).

Reason for Slew rate:

There is usually a capacitor within 0, outside an op-amp oscillation. It is this capacitor which
prevents the o/p voltage from fast changing input. The rate at which the volt across the capacitor increases is given
by

dVc/dt = I/C ----------------- (1)

I -> Maximum amount furnished by the op-amp to capacitor C. Op-amp should have the either a higher current or
small compensating capacitors.

For 741 IC, the maximum internal capacitor charging current is limited to about 15μA. So the slew rate of 741 IC is

SR = dVc/dt |max = Imax/C .

For a sine wave input, the effect of slew rate can be calculated as consider volt follower -> The input is large amp,
high frequency sine wave .

If Vs = Vm Sinwt then output V0 = Vm sinwt . The rate of change of output is given by

dV0/dt = Vm w coswt.
The max rate of change of output across when coswt =1

(i.e) SR = dV0/dt |max = wVm.

SR = 2∏fVm V/s = 2∏fVm v/ms.

Thus the maximum frequency fmax at which we can obtain an undistorted output volt of peak value Vm is given by

fmax (Hz) = Slew rate/6.28 * Vm .

called the full power response. It is maximum frequency of a large amplitude sine wave with which op-amp can
have without distortion.

Differential Amplifier:
Differential Amplifier

Thus far we have used only one of the operational amplifiers inputs to connect to the amplifier,
using either the "inverting" or the "non-inverting" input terminal to amplify a single input signal with the
other input being connected to ground. But we can also connect signals to both of the inputs at the same
time producing another common type of operational amplifier circuit called a Differential Amplifier.

Basically, as we saw in the first tutorial about operational amplifiers, all op-amps are
"Differential Amplifiers" due to their input configuration. But by connecting one voltage signal onto one
input terminal and another voltage signal onto the other input terminal the resultant output voltage will be
proportional to the "Difference" between the two input voltage signals of V1 and V2.

Then differential amplifiers amplify the difference between two voltages making this type of
operational amplifier circuit a Subtractor unlike a summing amplifier which adds or sums together the
input voltages. This type of operational amplifier circuit is commonly known as a Differential Amplifier
configuration and is shown below:
 By connecting each input inturn to 0v ground we can use superposition to solve for the output
voltage Vout. Then the transfer function for a Differential Amplifier circuit is given as:

When resistors, R1 = R2 and R3 = R4 the above transfer function for the differential amplifier
can be simplified to the following expression:

Differential Amplifier Equation

If all the resistors are all of the same ohmic value, that is: R1 = R2 = R3 = R4 then the circuit will
become a Unity Gain Differential Amplifier and the voltage gain of the amplifier will be exactly one or
unity. Then the output expression would simply be Vout = V2 - V1. Also note that if input V1 is higher
than input V2 the ouput voltage sum will be negative, and if V2 is higher than V1, the output voltage sum
will be positive.

The Differential Amplifier circuit is a very useful op-amp circuit and by adding more resistors in
parallel with the input resistors R1 and R3, the resultant circuit can be made to either "Add" or "Subtract"
the voltages applied to their respective inputs.

Inverting amplifier
In this configuration the input signal is applied to the inverting input terminal of the op-amp and
the non-inverting input terminal is connected to the ground. Figure shows the circuit of an open – loop
inverting amplifier.

The output voltage is 1800 out of phase with respect to the input and hence, the output voltage V0 is
given by,

V0 = -AVi

Thus, in an inverting amplifier, the input signal is amplified by the open-loop gain A and in phase –
shifted by 1800.

Inverting Operational Amplifier Configuration

In this Inverting Amplifier circuit the operational amplifier is connected with feedback to produce a closed loop
operation. When dealing with operational amplifiers there are two very important rules to remember about ideal
inverting amplifiers, these are: “No current flows into the input terminal” and that “V1 always equals V2”.
However, in real world op-amp circuits both of these rules are slightly broken.

This is because the junction of the input and feedback signal ( X ) is at the same potential as the positive ( + ) input
which is at zero volts or ground then, the junction is a “Virtual Earth”. Because of this virtual earth node the input
resistance of the amplifier is equal to the value of the input resistor, Rin and the closed loop gain of the inverting
amplifier can be set by the ratio of the two external resistors.