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Lecture #02, Microprocessor

The document provides an overview of the 8086 microprocessor architecture, highlighting its two main functional units: the Bus Interface Unit (BIU) and the Execution Unit (EU). It details the responsibilities of each unit, including instruction fetching, data operations, and instruction execution. Additionally, it describes the various groups of 16-bit registers used in the 8086 microprocessor for different operations.

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NMR Masum
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4 views7 pages

Lecture #02, Microprocessor

The document provides an overview of the 8086 microprocessor architecture, highlighting its two main functional units: the Bus Interface Unit (BIU) and the Execution Unit (EU). It details the responsibilities of each unit, including instruction fetching, data operations, and instruction execution. Additionally, it describes the various groups of 16-bit registers used in the 8086 microprocessor for different operations.

Uploaded by

NMR Masum
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CSE-3103: Microprocessor and Microcontroller

Dept. of Computer Science and Engineering


University of Dhaka

Prof. Sazzad M.S. Imran, PhD


Dept. of Electrical and Electronic Engineering
sazzadmsi.webnode.com
Basic Architecture of 8086
8086 microprocessor 
2 separate functional units.
1) Bus Interface Unit (BIU),
2) Execution Unit (EU).
employs parallel processing.

BIU  segment registers,


instruction pointer,
address generation and
bus control logic block,
instruction queue.

EU  general purpose registers,


ALU,
control unit,
instruction register,
flag (or status) register.
Basic Architecture of 8086
Main jobs of BIU 
external bus operations.
instruction fetching,
reading/writing of data/operands for memory,
inputting/outputting of data for peripheral devices.
filling instruction queue.
address generation.

Main jobs of EU 
decoding/execution of instructions.
accepts instructions from instruction queue,
data from  general purpose registers,
or memory.
generates operand addresses, hands them to BIU.
tests and updates status of flags in control register
when executing instructions.
waits for instructions from empty instruction queue.
Operations of Instruction Queue
Pipelining procedure saves time 
Operations of Instruction Queue
Queue operation 

CS:IP = odd  1 byte instruction


even  2 bytes instruction
Registers of 8086
Fourteen 16-bit registers 

Register groups 
data group 
AX, BX, CX, DX.
use bytewise or wordwise.
source or destination of operand.
pointers and index group 
SP, BP, SI, DI, IP.
segment group 
ES, CS, DS, SS.
status and control flag group 
single 16-bit flag register.

registers for specific operations 


CX = count register in string operations.
DX = hold address of I/O port.
AX = hold data for I/O operations.
BX = hold offset address.
CPU Registers
Fourteen 16-bit registers 

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