Course Curriculum (for Session 2021-22)
B.Tech. (Computer Science & Engineering)
BCSC1005: COMPUTER ORGANIZATION
Objective: This course aims to introducing the concept of computer organization. In particular, it focuses on
basic hardware architectural issues that affect the nature and performance of software.
Credits: 04 Semester III L T P: 3 1 0
Module Teaching
Content
No. Hours
Introduction: Basic organization of the computer and Block level description of the
functional units, Number representation; 1’s and 2’s Complement, Integer
Representation, Arithmetic Addition & Subtraction with overflow. fixed and
floating-point number representation, IEEE standard floating point representation.
Introduction to Combinational Circuit- half adder, full adder, binary adder/subtractor,
carry look ahead adders. Multiplexer and De-multiplexer, Register, bus and memory
I transfer, 20
Central Processing Unit: Addition and subtraction of signed numbers,
Multiplication: Signed operand multiplication, Booths algorithm.
Processor organization, general registers organization, stack organization, Three,
Two, One & Zero address instruction. Addressing modes, Micro-operations
(Arithmetic, Logical & Shift) and its applications.
Multiprogramming and Multiprocessing; Flynn’s classification, Introduction to
pipelined operation. Instruction types, formats, Instruction cycles.
Control Unit: Execution of a complete instruction. Hardwired and micro
programmed control unit. Unconditional and Conditional branching.
Microinstruction with next address field, pre-fetching microinstructions, Concept of
horizontal and vertical microprogramming.
Memory: Basic concept of Memory and its hierarchy, RAM memories, 2D, 2 &
II 1/2D memory organization. ROM memories. Cache memories: concept and design 20
issues, performance, address mapping and replacement. Virtual memory: concept
and implementation.
Input/Output: Peripheral devices, I/O interface, I/O ports, Interrupts: interrupt
hardware, types of interrupts and exceptions. Buses, bus architecture, types of buses
and bus arbitration. Modes of Data Transfer: Programmed I/O, interrupt initiated I/O
and Direct Memory Access., I/O channels and processors. Standard communication
interfaces.
Text Books:
rd Edition, PHI.
Reference Books:
D.W. Patterson (2008) thEdition, Elsevier Publication.
th Edition, PHI
th International Edition, TMH.
nd Edition, TMH.
thEdition, PHI.
ndEdition, PHI.
Outcome: After completion of the course, the student will be able to:
CO1- Understand the basics of digital computer system.
CO2- Demonstrate the principle of arithmetic operations on unsigned, signed integers and floating point numbers.
CO3- Understand the concepts of combinational and sequential circuits and their applications.
CO4- Understand the CPU architecture and organization.
CO5- Explain the basic concepts of pipelining.
CO6- Design the steps for the execution of the complete instruction for hardwired and micro-programmed control
unit.
CO7- Explain the function of memory hierarchy.
CO8- Determine the interface of CPU with input/output devices and their modes of transfer.
DEPARTMENT OF COMPUTER ENGINEERING & APPLICATIONS, Institute of Engineering &
Technology 44
