1. What is the Logic Function realized by the circuit?
A) NAND Gate B) AND Gate C) NOR Gate D) OR Gate
2. If a sine wave signal is 100 mV peak-to-peak, how many volts would be measured by a
voltmeter?
[A]. 14.14 mV [C]. 63.7 mV
[B]. 35.4 mV [D]. 70.7 mV
3. Calculate the equivalent resistance between A and B from the following diagram:
_
4. What is the output voltage, in the given figure?
A. 1 V C. +Vsat
B. 1V D. Vsat
5. In the given figure assume R1=R2=R3 , What will happen to the current through R1 and R2 if
resistor R3 is removed ?
6. Refer to this figure. Assume IC IE. Determine the value of RC that will allow VCE to equal
10 V.
A. 1k
B. 1.5 k
C. 2k
D. 2.5 k
7. Refer to this figure. Calculate the current I2.
A. 32 mA
B. 3.2 mA
C. 168 A
D. 320 A
8. Refer to this figure. In the voltage-divider biased npn transistor circuit, if R1 opens, the
transistor is
A. saturated.
B. cutoff.
C. nonconducting.
D. None of the above
9. What is the total current in the given circuit?
A. 0.28 A
B. 0.399 A
C. 909 A
D. 0.2 A
10. Which element dictates the maximum level of source voltage?
A. VZ
B. IZM
C. IZ
D. None of the above
11. Consider the following Network. Power Associated with dependent source is ------
A) 611 Watts
B) 565Watts
C) 889 Watts
D) 736 Watts
12. Output of the given circuit Q is
A) ABC B) A B C C) A B C D) ABC
13. If the op-amp in figure has an input offset voltage of 3mV and open loop voltage gain of
5000, then V0 will be
A) 0V
B) 3mV
C) 0.3 mV
D) +12 V
E) -12 V
14. Consider the below circuit, for V1 Vm sin t . The output Voltage V0 for R will be
A) Zero
B) Vm
C) 2 Vm
D) - Vm
15. The value of current I in the given circuit is
A) 0A
B) 0.5 A
C) 1A
D) 2A
16. The output voltage (v0) of the given circuit is -----. The threshold voltage (VT) of the FET is 1V.
A) 2V
B) 3V
C) 4V
D) 4.5V
E) 4.2V
17. The full scale input voltage to an ADC is 10V. The resolution required is 5mV. The minimum
number of bits required for ADC is -----.
A) 8 B) 9 C) 10 D) 11
18. A flip flop is designed by using JK flip flop in such a way that J will be given direct input and
K will be given inverted input, then the resulted flip flop is
A) SR flip flop B) JK flip flop itself C) D flip flop D) T flip flop
19. A Transistor has a current gain of 0.99 in the CB mode. Its current gain in the CC mode is
A) 100 B) 99 C) 1.01 D) 0.99
20. The circuit shown in the below figure is
A) Low pass filter
B) High pass filter
C) Band pass filter
D) Band stop filter
21. At t = 0, switch is moved from position 1 to 2. Solve for i.
A) -40 e(-t/250) mA
B) -80 e(-t/250) mA
C) -80 e(-t/250) µA
D) -40 e(-t/250) µA
22. In the circuit shown in figure below the voltmeter is connected across AB. If the voltmeter
has a resistance of 1200 , the measured value is
A) 21.8V B) 24V C) 22.8V D) 40
23. Current gain of the given NPN transistor ( ) is 99. The output V o for the circuit is
A) -1 V
B) -1/3.3V
C) 0V
D) 2V
24. In the circuit shown, break down voltage of zener diode is 3.2V. The output voltage V0 for
an input voltage Vi = + 1V is closed to
A) -10V
B) -6.6V
C) -5V
D) -3.2 V
25. A two bit counter circuit is shown below
If the state QA QB of the counter at the clock time tn is 10 then the state Q AQB of the counter
at tn+3 (after three clock cycles) will be
A) 00 B) 01 C) 10 D) 11
26. Octal equivalent of HEX number AB.CD is
A) 253.314 B) 253.632 C) 526.314 D) 526.632
27. The common emitter forward current gain of the transistor shown is = 100.
A) Saturation region
B) Cut off region
C) Reverse active region
D) Active region
The transistor is operating in
28. Two perfectly matched silicon transistor are connected as shown in figure. The value of
current I is
A) 0mA
B) 2.3 mA
C) 4.3 mA
D) 7.3 mA
29. Assuming that the diodes are ideal in figure, the current in diode D1 is
A) 9 mA
B) 5 mA
C) 0 mA
D) -3 mA
30. For the circuit shown below, the switch is closed at t= 0 sec. calculate i2 at t = 0.3 seconds.
A) 0.636 A
B) 0.836 A
C) 1.032 A
D) 1.413 A
31. The output Q for the given circuit is
A) X1 X2
B) X 1 . X 2
C) X 1. X 2
D) X 1 . X 2
32. The Boolean expression for the output Y of the given circuit
A) P Q R S
B) P Q R S
C) P Q.R S
D) P Q .(R S )
33. The power dissipated in 3 resistor will be maximum if the value of R is
A) 30
B) 16
C) 9
D) zero
34. For the given circuit, the current I is
A) 2A
B) 5A
C) 7A
D) 9A
Thanks to Department of Electronics and Instrumentation for
sharing the question paper.
