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The document contains a series of questions and answers related to CPU components, registers, memory, the fetch-execute cycle, buses, instruction classifications, and miscellaneous topics. It covers the roles of the ALU and CU, types of memory, the fetch-execute cycle steps, bus types, and instruction classifications. Each question is designed to test knowledge on fundamental concepts of computer architecture.

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0% found this document useful (0 votes)
3 views9 pages

Google Keep Document-1

The document contains a series of questions and answers related to CPU components, registers, memory, the fetch-execute cycle, buses, instruction classifications, and miscellaneous topics. It covers the roles of the ALU and CU, types of memory, the fetch-execute cycle steps, bus types, and instruction classifications. Each question is designed to test knowledge on fundamental concepts of computer architecture.

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harukogg503
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CPU Components

1. Which of the following best describes the role of the ALU?

A) Controls program execution

B) Handles arithmetic and logical operations

C) Stores memory addresses

D) Transfers data between the CPU and memory

2. The CU ensures instructions are carried out in:

A) Random order

B) Sequential order

C) Reverse order

D) Parallel order

3. What is the combined unit that works as a connection hub for the CPU?

A) Control Unit

B) ALU

C) Bus Interface Unit

D) Status Register

4. The I/O interface acts as a:

A) Memory controller

B) Translator between CPU and external devices

C) Data processor

D) Signal amplifier

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Registers
5. General-purpose registers are mainly used for:

A) Permanent data storage

B) Temporary storage during calculations

C) Managing I/O devices

D) Controlling system operations

6. What does the Memory Address Register (MAR) store?

A) Data fetched from memory

B) Memory address of the data or instruction

C) Current program status

D) The next instruction

7. Which register keeps track of the next instruction to be executed?

A) Instruction Register

B) Program Counter

C) Status Register

D) Memory Data Register

8. What is stored in the Memory Data Register (MDR)?

A) The address of the data

B) The data being read from or written to memory

C) The current program state

D) The opcode

9. Status registers use small single-bit flags to:

A) Store instructions

B) Monitor specific CPU conditions

C) Manage memory operations


D) Control the system clock

10. What flag indicates an arithmetic operation exceeded the register’s capacity?

A) Carry flag

B) Overflow flag

C) Zero flag

D) Error flag

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Memory

11. What happens to volatile memory when the power is turned off?

A) It retains its data

B) It loses all its data

C) It stores backup data

D) It switches to nonvolatile mode

12. ROM is typically used for:

A) Temporary data storage

B) Permanent storage of firmware

C) Storing user applications

D) High-speed memory caches

13. Which type of memory is refreshed constantly to retain data?

A) SRAM

B) DRAM

C) EEPROM

D) Flash Memory
14. Flash memory is faster than:

A) ROM

B) SRAM

C) Traditional disk storage

D) Cache memory

15. A memory cell stores:

A) Multiple data units

B) A single unit of data

C) A full program

D) Multiple instructions

16. What determines the total number of unique memory locations a system can address?

A) Number of bits in the CPU

B) Number of bits in the MAR

C) Size of the MDR

D) Bus width

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Fetch-Execute Cycle

17. What happens during the decode step of the fetch-execute cycle?

A) The CPU fetches the next instruction

B) The instruction is interpreted to determine the required action

C) Data is written to memory

D) The Program Counter is updated

18. In the fetch step, where is the instruction placed after being fetched?
A) MAR

B) MDR

C) IR

D) PC

19. During the execute step, the CPU may:

A) Decode the instruction

B) Fetch the next instruction

C) Perform arithmetic operations

D) Update the status register

20. What triggers the next fetch cycle?

A) Decoding the instruction

B) Executing the instruction

C) Incrementing the Program Counter

D) Writing data to memory

---

Buses

21. A bus is a system that transfers:

A) Instructions between the ALU and CU

B) Data, addresses, and signals between components

C) Power to the CPU

D) Programs to memory

22. Which type of bus carries commands to manage system operations?

A) Data Bus
B) Address Bus

C) Control Bus

D) Multipoint Bus

23. Parallel buses are faster for:

A) Long distances

B) Short distances

C) Multipoint connections

D) Serial communications

24. Which bus configuration connects multiple devices over a shared connection?

A) Serial bus

B) Point-to-point bus

C) Multipoint bus

D) Parallel bus

25. What is the main advantage of serial buses over parallel buses?

A) Higher speed over short distances

B) Lower sensitivity to interference

C) Larger physical size

D) Higher cost

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Instruction Classifications

26. Arithmetic instructions include:

A) AND, XOR, NOT

B) ADD, SUB, MULT


C) LOAD, STORE

D) PUSH, POP

27. Single operand manipulation instructions can:

A) Increment or negate a value

B) Perform binary addition

C) Handle I/O operations

D) Transfer data between registers

28. Program control instructions manage:

A) CPU status flags

B) Data movement in memory

C) The sequence of program execution

D) ALU operations

29. Flags are used to:

A) Indicate conditions in the CPU

B) Control the system clock

C) Store temporary data

D) Decode instructions

30. Which instructions allow operations on multiple data items simultaneously?

A) Boolean logic instructions

B) Stack instructions

C) SIMD instructions

D) Register shift instructions

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Miscellaneous

31. Which addressing mode provides data directly in the instruction?

A) Immediate

B) Direct

C) Indirect

D) Indexed

32. What does the opcode in an instruction represent?

A) The result location

B) The operation to be performed

C) The data location

D) The size of the instruction

33. The stack follows which principle?

A) FIFO

B) LIFO

C) Shortest job first

D) Round-robin scheduling

34. A subroutine is used for:

A) Managing memory allocation

B) Repeating a specific task in a program

C) Monitoring system performance

D) Fetching data from memory

35. Push and pop operations are associated with:

A) Registers

B) Stacks
C) Buses

D) Flags

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