Understand central processing unit functions

A. The Central Processing Unit (CPU)

The "brain" of the computer. It's the main component that performs all the calculations and
logical operations.
The CPU itself is made of three key components that work together to process instructions.
Arithmetic Logic Unit (ALU): It performs all the calculations (like addition e.g., 2+2 and
subtraction e.g., 8-4) and logical comparisons (like comparing two numbers to see if they are
equal e.g., is 5 > 3).
Control Unit (CU): Directs all operations. It fetches instructions from memory, decodes
them, and tells the ALU and other parts what to do. I.e. The traffic police officer on a road
controlling the flow of traffic.
This is the "conductor" or "manager." It manages all the computer's operations. It tells other
components what to do and when to do it. It fetches instructions from memory and directs
the flow of data.
Jobs of Control Unit

 Controlling and coordinating the activities of the CPU

 Managing the flow of data between the CPU and other devices
 Accepting the next instruction
 Decoding instructions
 Storing the resulting data back in memory
Registers: Small, extremely fast memory locations inside the CPU used to hold temporary
data and instructions currently being executed. I.e. The small notepad a waiter uses to
quickly jot down a customer's destination before forgetting it.
Registers and their purposes
Program Counter (PC) : Holds the address of the next instruction to be executed.
Accumulator (ACC): Stores the results from calculations
Memory Address Register (MAR) : Holds the address of a location that is to be read from or
written to.
Memory Data Register (MDR) : Temporarily stores data that has been read or data that
needs to be written.
Current Instruction Register (CIR): Holds the current instruction being executed, divided up
into opcode(instruction to be carried out) and operand(memory address of data to be
operated on).
The fetch-decode-execute cycle
The fetch-decode-execute cycle is followed by a processor to process an instruction. The
cycle consists of several steps:
1. The memory address held in the program counter is copied into the MAR.
2. The address in the program counter is then incremented. The program counter now holds
the address of the next instruction to be fetched.
3. The processor sends a signal containing the address of the instruction to be fetched along
the address bus to the computer’s memory.
4. The instruction held in that memory address is sent along the data bus to the MDR.
5. The instruction held in the MDR is copied into the CIR.
6. The instruction held in the CIR is decoded and then executed.
7.The results of processing are stored in the ACC.
The cycle then returns to step one.

Timing
The system clock – generates a continuous sequence of clock pulses to step the control unit
through its operation. This is an electronic device which generates signals, switching
between 0 and 1. All processor activities begin on a clock pulse, and each CPU operation
starts as the clock changes from 0 to 1. The clock speed is the time taken for one clock cycle
to complete
At each clock pulse, the control unit sends control signals to control inputs of the bus, the
registers, and the ALU.
Clock speed
In order to synchronise the various steps carried out during the fetch-execute cycle, all the
processors have an internal clock which generates regularly timed pulses. All the processor
activities, such as fetching an instruction, reading data into the memory register etc. must
begin on a clock pulse, although some activities take more than one clock pulse to
complete.
Typically the clock pulse rate in 2000 is around 500 megahertz (million cycles per second).
The clock speed, therefore, is one of the factors which will influence the speed at which
instructions are executed; a 600MHZ processor will in general operate faster than a 500MHz
processor
 start

Fetch
a) copy address from PC -> MAR
b) PC is incremented
c) The instruction held in that memory
address held by MAR are sent to MDR
d) copy data from MDR -> CIR

Decode
a) CU decodes instruction in CIR
b) Identifies operation & data

Execute
a) CU sends signals to perform the operation
(e.g., ALU)
b) Result stored (e.g., in ACC)
c) Status flags are updated

stop

Instruction Representation
Each instruction has two main components:
Opcode – tells the CPU what to do (e.g., ADD, LOAD).
Operand(s) – tells the CPU where/what data to use (register, memory, constant).

Addressing and addressing modes

The most common addressing modes are:
1. Immediate addressing mode
This is the simplest form of addressing. Here, the operand is given in the instruction.
This mode is used to define constant or set initial values of variables.
The advantage of this mode is that no memory reference other than instruction fetch is
required to obtain operand.
The disadvantage is that the size of the number is limited to the size of the address field
because most instruction sets is small compared to word length.
Example: ADD 3
Adds 3 to contents of accumulator and 3 is the operand.

2. Direct addressing mode

In direct addressing mode, effective address of the operand is given in the address field of
the instruction.
It requires one memory reference to read the operand from the given location and provides
only a limited address space.
Length of the address field is usually less than the word length.
Example :
Move P, Ro
Add Q, Ro
Where P and Q are the address of operand, Ro is a register ie the accumulator.

3. Indirect addressing mode

Indirect addressing mode, the address field of the instruction refers to the address of a word
in memory, which in turn contains the full length address of the operand.
The address field of instruction gives the memory address where on, the operand is stored
in memory.
Control fetches the instruction from memory and then uses its address part to access
memory again to read Effective Address.
The advantage of this mode is that for the word length of N, an address space of 2N can be
addressed.
The disadvantage is that instruction execution requires two memory references to fetch the
operand.
Multilevel or cascaded indirect addressing can also be used.
Example: Effective Address (EA) = (A).
The operand will be present in the memory location A.
4. Register addressing mode
Register addressing mode is similar to direct addressing. The only difference is that the
address field of the instruction refers to a register rather than a memory location.
3 or 4 bits are used as address field in the instruction to refer 8 to 16 generate purpose
registers (GPR).
The operands are in registers that reside within the CPU.
The instruction specifies a register in CPU, which contain the operand.
There is no need to compute the actual address as the operand is in a register and to get
operand there is no memory access involved.
The advantages of register addressing are small address field is needed in the instruction
and faster instruction fetch.
The disadvantages includes very limited address space and usage of multiple registers helps
in performance but it complicates the instructions.
Example: MOV AX, BX

5. Register indirect addressing mode

This mode is similar to indirect addressing. The address field of the instruction refers to a
register.
The instruction specifies a register in CPU whose contents give the operand in memory.
The selected register contain the address of operand rather than the operand itself.
The register contains the effective address of the operand. This mode uses one memory
reference to obtain the operand.
Control fetches instruction from memory and then uses its address to access Register and
looks in Register(R) for effective address of operand in memory.
The address space is limited to the width of the registers available to store the effective
address.
Example: MOV AL, [BX]
Code example in Register:
MOV BX, 1000H
MOV 1000H, operand
The instruction (MOV AL, [BX]) specifies a register [BX] which contain the address of
operand (1000H) rather than address itself.

Prescribing & Verifying CPU Specifications/ Standard CPU specification factors

When recommending a CPU, consider:
1. Clock speed (GHz) – Speed at which the CPU executes instructions, measured in GHz
(Gigahertz). 1 GHz = 1 billion cycles per second. A 4.0 GHz CPU is faster than 2.5 GHz
for single-core tasks (higher means faster execution.). It is used when prescribing a
CPU for speed-demanding tasks like gaming or video editing.
2. Number of cores – core is like a mini-CPU inside the processor each containing an
ALU, control unit and registers. More cores = more tasks handled at once
(multitasking). Dual-core (2 cores): Basic tasks like Word, browsing, Quad-core (4
cores): Good for students and office use and Octa-core (8 cores): Needed for
designers, gamers, programmers. More cores = better multitasking.
3. Cache size (L1, L2, L3) – Very fast memory inside CPU used to store frequently
accessed data. Improves speed by storing frequently used data. Level 1 Cache Very
fast memory cells with a small capacity (2-64KB). Level 2 Cache Relatively fast
memory cell, with a medium sized capacity (256KB-2MB). Level 3 Cache Much larger
and slower memory cell.
4. Instruction set type – RISC (mobile, more power efficient) vs CISC (PCs, compatible).
5. Power consumption & heat (TDP – Thermal Design Power) – How much heat and
power the CPU uses. High TDP CPUs need good cooling systems. Laptop CPU = ~15W
(saves battery). While Gaming Desktop CPU = ~125W (needs cooling).
6. Compatibility – CPU must match the motherboard socket and RAM type. Intel i7-
11700K uses LGA1200 socket and supports DDR4 RAM while AMD Ryzen 5 5600X
uses AM4 socket.
7. Generation & Model: CPU families evolve in generations with improvements in
speed, efficiency, and technology.Example: Intel i5-7500 (7th Gen, 2017) vs i5-12400
(12th Gen, 2022). Even at the same clock speed, newer generation = better
performance. Prescriptions should be based on latest models for future-proofing.