Data and Computer

Communications
Chapter 6 – Digital Data
Communications Techniques

Compiled by Dr. Farruk Ahmed

 Asynchronous and
Synchronous Transmission
 timing problems require a mechanism to
synchronize the transmitter and receiver
 receiver samples stream at bit intervals
 if clocks not aligned, drifting will sample at
wrong time after sufficient bits are sent
 two techniques to synchronizing clocks
 asynchronous transmission
 synchronous transmission
Asynchronous Transmission
 Asynchronous - Behavior
 simple
 cheap
 overhead of 2 or 3 bits per char (~20%)
 good for data with large gaps (keyboard)
 Synchronous Transmission
 block of data transmitted, sent as a frame
 clocks must be synchronized
 can use separate clock line
 or embed clock signal in data
 need to indicate start and end of block
 use preamble and post-amble
 more efficient (lower overhead) than
asynchronous
 Types of Error
 an error occurs when a bit is altered between
transmission and reception
 single bit errors
 only one bit altered
 caused by white noise
 burst errors
 contiguous sequence of B bits in which first, last and
any number of intermediate bits are in error
 caused by impulse noise or by fading in wireless
 effect is greater at higher data rates
 Error Detection
 will have errors
 detect using error-detecting code
 added by transmitter
 recalculated and checked by receiver
 still chance of undetected error
 parity
 parity bit set so frame has even number of ones
(even parity) or odd number of ones (odd parity)
 even number of bit errors goes undetected
Error Detection Process
 Error Detection
 Pb= Probability a bit is received in error, Bit
Error Rate (BER)
 P1= Probability a frame is received with no
error
 P2= Probability a frame is received with
undetected error
 F = bits / frame
 Then, P1= (1- Pb)F , P2= (1- P1)
 Error Detection
# ISDN has 64 Kbps channel, 1 frame with
undetected error per day is expected, (1
frame = 1000 bits), Frames / day = ? P2= ?

 If Pb= 10-6, can we achieve the above P2?

 Cyclic Redundancy Check
 one of most common and powerful checks
 for block ofk bits, transmitter generates an
n-k bit frame check sequence (FCS)
 Transmits n bits which is exactly divisible
by some number
 receiver divides frame by that number
 if no remainder, assume no error
 for math, see Stallings chapter 6
 Cyclic Redundancy Check
 Basis: Modulo-2 arithmetic (X-or for + or -)
 Message, M = 1010001101
 Pattern, P = 110101 (MSB & LSB = ‘1’)
 FCS = ? (5 bits) (01110)
 Multiply the Message by 25, then divide by
the Pattern. Remainder is added with the
Message and transmitted.
 P is one bit longer than FCS.
 Cyclic Redundancy Check
 Digital Logic Implementation:
 Message, M = 1010001101 = X9+
X7+X3+X2+1, Pattern, P = 110101 = Poly.?
 Register length = FCS
 Presence of a gate corresponds to a term
in polynomial P, excluding 1 (X0) and Xn-k
 Error Correction
 correction of detected errors usually requires
correct data block to be retransmitted
 not appropriate for wireless applications
 bit error rate is high causing lots of retransmissions
 when propagation delay long (satellite) compared with
frame transmission time, resulting in retransmission of
frame in error plus many subsequent frames
 instead need to correct errors on basis of bits
received
 error correction provides this
Error Correction Process
 How Error Correction Works
 adds redundancy to transmitted message
 can deduce original despite some errors
 e.g. block error correction code
 map k bit input onto an n bit codeword
 each distinctly different
 if get error, assume codeword sent was
closest to that received
 for math, see Stallings chapter 6
 Much reduced effective data rate
 Block Code Principles
 Hamming distance = difference in # of bits,
 p = 011011, q = 110001, d (p,q) = ?
 Data Code
 00 00000
 01 00111
 10 11001
 11 11110
 Received 00100, valid? Can it be corrected?
 Block Code Principles
 # Find the distance between all the valid codes
(in pairs) for the code in previous slide.
 ‘Select the code at the minimum distance’
 Find distances and the minimum.
 Received 00100, correct word?
 More than one minimum distance!!!
 01010 (Invalid) => valid 00000 and 11110
 ‘Equidistance of 2’ => can detect, not correct
 Hamming ECC
 ‘use of extra parity bits to allow the
position identification of a single error’
 1. Mark all bit positions that are powers of
2 as parity bits. (positions 1, 2, 4, 8, 16,
etc.)
 2. All other bit positions are for the data to
be encoded. (positions 3, 5, 6, 7, 9, 10, 11,
12, 13, 14, 15, etc.)
 Hamming ECC
 3. Each parity bit calculates the parity for some of
the bits in the code word. The position of the parity
bit determines the sequence of bits that it checks.
 Position 1: checks bits (1,3,5,7,9,11,...) – Alternate
Position 2: checks bits (2,3,6,7,10,11,14,15,...) –
Alternate 2-bits
 Position 4: checks bits
(4,5,6,7,12,13,14,15,20,21,22,23,...) -Alternate 4-
bits
 Hamming ECC
 Position 8: checks bits (8-15,24-31,40-
47,...) – Alternate 8-bits
4. Set the parity bit to create even parity.

 A byte of data: 10011010

 Place the data word, leaving spaces for
the parity bits: _ _ 1 _ 0 0 1 _ 1 0 1 0
Calculate the parity bits.
 Hamming ECC
 Position 1 checks bits 1,3,5,7,9,11:
? _ 1 _ 0 0 1 _ 1 0 1 0. set position 1 to a 0:
0_1_001_1010
 Position 2 checks bits 2,3,6,7,10,11:
0 ? 1 _ 0 0 1 _ 1 0 1 0. set position 2 to a 1:
011_001_1010
 Position 4 checks bits 4,5,6,7,12:
0 1 1 ? 0 0 1 _ 1 0 1 0. set position 4 to a 1:
0111001_1010
 Hamming ECC
 Position 8 checks bits 8,9,10,11,12:
0 1 1 1 0 0 1 ? 1 0 1 0. set position 8 to a
0: 0 1 1 1 0 0 1 0 1 0 1 0
 Final code word: 011100101010.
 Finding and fixing a corrupted bit:
 Suppose that the word was received as
011100101110 instead.
 The method is to verify each check bit.
 Hamming ECC
 Parity bits 2 and 8 are incorrect. It is 2 + 8 = 10,
that bit position 10 is the location of the bad bit
and needs to be inverted.
 # Test if these Hamming-code words are correct.
If one is incorrect, indicate the correct code word.
Also, indicate what the original data was.
 010101100011
 111110001100
 000010001010
 Problem
# For each data unit of following sizes, find
the minimum number of redundancy bits
needed to correct single bit error (using
Hamming code). Specify their positions.
a) 12
b) 16
c) 24
d) 64
Find also the utilization of the code space.
 Error Correction
 2-dimensional Parity:
 PV
0 1 1 0 0
1 0 1 0 0
1 1 1 0 1
0 1 1 1 1
0 1 0 1 0 PH
Line Configuration - Topology
 physical arrangement of stations on
medium
 point to point - two stations
• such as between two routers / computers
 multi point - multiple stations
• traditionally mainframe computer and terminals
• now typically a local area network (LAN)
Line Configuration - Topology
 Line Configuration - Duplex
 classify data exchange as half or full duplex
 half duplex (two-way alternate)
 only one station may transmit at a time
 requires one data path
 full duplex (two-way simultaneous)
 simultaneous transmission and reception between
two stations
 requires two data paths
• separate media or frequencies used for each direction
 Summary
 asynchronous verses synchronous
transmission
 error detection and correction
 line configurations