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FPGA Implementation of An 8-Bit Simple Processor

The document describes the design and implementation of an 8-bit simple processor on an FPGA. It includes details on the instruction set, control unit, ALU, memory unit, and full microprocessor design. Group members implemented the processor using VHDL with a maximum frequency of 95.364MHz utilizing 132 FPGA slices.

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محمد عثمان
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345 views12 pages

FPGA Implementation of An 8-Bit Simple Processor

The document describes the design and implementation of an 8-bit simple processor on an FPGA. It includes details on the instruction set, control unit, ALU, memory unit, and full microprocessor design. Group members implemented the processor using VHDL with a maximum frequency of 95.364MHz utilizing 132 FPGA slices.

Uploaded by

محمد عثمان
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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FPGA Implementation of an

8-bit Simple Processor

Group members:

Gul Noor (080187)


Malik Usman(080088)
Samran Safi (080037)
Zobia Ilyas (080139)
Introduction
 Embedded microprocessors applications

 Design options :
a) DSPs
b) ASICs
c) FPGA

 FPGA preferred usually


 FPGA 8-bit processor is designed using VHDL. It consists of:
a) 4 four bit registers
b) 16-word memory with 8-bit words
c) Control unit
d) ALU
Instruction set
 8-bit set of instructions used

 Instructions are of three types:

a) Register Instruction:
It consists of OP, CC, SRC and DST fields

b) Branch Instruction:
It locates addresses in the memory specified by lower four
bits of instruction.

c) Halt and I/O Instruction:


Used when the bit sequence of 1100 appears at the first four
bits
Register Instruction

76 54 32 10
OP CC SRC DST

OP Function CC CI
(R0) 00 0
00 (SRC)+CI<=DST
(R1) 01 1
01 (SRC)+DST+CI<=DST
(R2) 10 C

10 DST-(SRC)-CI<=DST
(R3) 11 C’
BRANCH INSTRUCTION
7 6 5 4 3 2 1 0
1 1 C C ADDRESS

Halt and I/0 instruction


7 6 5 4 3 2 1 0
1 1 0 0 L H DST
MICROPROCESSOR DESIGN
 FPGA based processor is the combination of three
main units:
a) Control unit
b) Arithmetic unit (ALU)
c) Memory
 Sub components are:
a) Program Counter
b) An Instruction Register
c) Multiplexers (MUX)
d) Demultiplexers (DMUX)
e) NAND Gates
f) D-Latches
COMPLETE MICROPROCESSOR
MAP
CONTROL UNIT
ARITHMATIC LOGIC UNIT(ALU)
 ALU performs addition and subtraction. It comprises of a 4-bit
full adder and a unit that is used to obtain the 2’s compliment
of numbers involving subtractions
MEMORY
 The memory for our processor is 256 bytes

 Each memory bit (SRAM cell) in the static RAM comprises of


an AND gate, a D latch and a tri-state buffer

 When a cell’s SEL_L input is true, the stored data is placed on


the cell’s output

 When both SEL_L and WR_L are true, the latch is open and a
new data bit is stored
CONCLUSION
 FPGA based 8-bit Processor was implemented using VHDL
language

 It consists of Control Unit, ALU and a Memory Unit

 Maximum operating frequency was 95.364MHZ and 132 Slices


were utilized

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