DESIGN AND IMPLEMENTATION OF
SIMPLE AS POSSIBLE COMPUTER
(SAP-1)
1
Navila Rahman Nadi
11/1/22
SAP-1 Introduction
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SAP-1 is the first stage in the evolution towards
modern computers.
The main purpose of SAP is to introduce all the crucial
ideas behind computer operations.
Being a simple computer, SAP-1 also covers many
advanced concepts.
SAP-1 is a bus organized computer. All registers are
connected to the W bus.
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SAP-1
Block Diagram
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Main Features
4
Simple-As-Possible.
One output device with 8 LEDs (output)
16x8 state of read only memory.
5 instructions
Accumulator Architecture
Accumulator, Out Register,
B Register, Memory Address Register (MAR)
Instruction Register (IR).
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Architecture
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8-bit "W" bus.
4-bit program counter, only counts up, it starts counting from 0
and counts up to 15.
4-bit Memory Address Register (MAR).
16 Byte Memory.
8-bit (1 Byte) Instruction Register (IR).
6-cycle controller with 12-bit microinstruction word.
8-bit Accumulator.
8-bit B Register.
8-bit adder/subtractor.
8-bit Output Register.
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Program Counter
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Instructions to be executed are placed at the starting addresses
of memory, e.g. the first instruction of a program will be placed
at binary address 0000. the second at address 0001.
Now to execute one instruction, first step is to generate the
address at which this instruction is placed in memory.
So this address is generated by (4-bit) Program Counter, that
counts from 0000 to 1111 (for total of 16 memory locations).
If the value of program counter is 0100, then the instruction at
address at 4 will be executes next.
program counter is like a pointer register; it points to the
address of next instruction to be executed.
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Input and Memory Address Register (MAR)
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The MAR stores the (4-bit) address of data and
instruction which are placed in memory.
When SAP-1 is Running Mode, the (4-bit) address is
generated by the Program Counter which is then
stored into the MAR through W bus.
A bit later, the MAR applies this 4-bit address to the
RAM, where Data or instruction is read from RAM.
It is formed by some switch address registers which
allow to send 4 bit address bits to the RAM.
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The RAM
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In initial design, the RAM is a 16 x 8 static TTL RAM. It
means there are 16 memory locations (from 0 to 15) and
each location contains an 8-bit of data/instruction.
You can program the RAM by means of the switches to be
used for address and data. This allows you to store a
program and data in the memory before a computer run.
During a computer run, the RAM receives 4-bit addresses
from the MAR and a read operation is performed,
in this way, the instruction or data stored in the RAM is
placed on the W bus for use in some other part of the
computer.
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Intruction Register
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When the instruction is placed at W-bus from memory,
the Instruction Register stores this instruction on the
next positive clock edge.
The contents of the instruction register are split into
two nibbles.
The upper nibble is a two-state output that goes directly to the
block labeled "Controller-sequencer“
The lower nibble is a three-state output that is read onto the W
bus when needed.
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Adder/Subtractor
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SAP-1 uses a 2's complement adder-subtractor. When
Controller sequences gives low input (logic 0), the sum
is:
S = A + B
When Su is high (logic 1), the sum is:
S = A + B’ + 1
The Adder-subtractor is asynchronous and its contents
change as soon as the input changes.
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Accumulator
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To add/sub two 8-bit numbers A and B, the
accumulator register stored the number A.
The Accumulator has two outputs.
One output goes to the adder/subtractor
The other goes to the W through tri-state buffers.
It also stores the (answer of two values) output of
adder/subtractor through w-bus.
It’s value is appeared on w-bus when its related signal
is high, which can then be read by output register.
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B Register
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To add/sub two 8-bit numbers A and B, the B register
stored the number B.
It supplies the number to be added or subtracted from
the contents of accumulator to the adder/subtractor.
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Output Register
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At the end of an arithmetic operation the accumulator
contains the word representing the answer,
Then answer stored in the accumulator register is then
loaded into the output register through W-bus.
.
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Binary Display
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The binary display is a row of eight light-emitting
diodes (LEDs).
Because each LED connects to one flip-flop of the
output port, the binary display shows us the contents
of the output port.
Therefore, after we've transferred an answer from the
accumulator to the output port, we can see the answer
in binary form.
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Controller Sequencer
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The 12 bits coming out of the Controller Sequencer form a
word that controls the rest of the computer. Before each
operation a Clear (CLR) signal resets the computer.
The 12 wires carrying the control word are called the Control
Bus. The control word has the format:
C P E P LM CE L1 E1 L A E A SU EU LB LO
CON
This word determines how the registers will react to the next
positive clock (CLK) edge. For instance a high and a low
means that the contents of Program Counter are latched into
MAR on the next positive clock edge. As another example, a
low and a low mean that the addressed RAM word will be
transferred to the accumulator on the next positive clock edge.
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Instruction Set
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Computer is a useless hardware until it is programmed
This means loading step-by-step instructions into the
memory before the start of a computer run.
Before you can program a computer, however, you must
learn its instruction set, the basic operations it can
perform. The SAP-1 instruction set follows.
SAP-1 INSTRUCTION SET
Mnemonics Operation Description
LDA ACC ← RAM[MAR] Load RAM data into accumulator
ADD ACC ← ACC + B Add RAM data to accumulator
SUB ACC ← ACC – B Subtract RAM data from accumulator
OUT OUT ← ACC Load accumulator data into output register
HLT CLK ← 0 Stop processing
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Op Codes of SAP-1
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To load instruction and data words into the SAP-1 memory , we
have to use some kind of code that the computer can interpret.
The number 0000 stands for LDA, 0001 for ADD, 0010 for SUB,
0000 for OUT, and 1111 for HLT.
Because this code tells the computer which operation to
perform, it is called an operation code (op code).
Assembly language involves working TABLE 2, SAP-1 OP CODES
Mnemonics Op Code
with mnemonics when writing a
LDA 0000
program.
ADD 0001
Machine language involves
SUB 0010
working with strings of 0s and 1s. OUT 1110
HLT 1111
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LDA Instruction
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LDA stands for "load the accumulator," A complete LDA
instruction includes the hexadecimal address of the
data to be loaded.
For example, LDA 8H means “load the accumulator
with the contents of memory location 8H.”
Therefore, given RAM[8] = 1111 0000
The execution of LDA 8H results in ACC = 1111 0000
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ADD Instruction
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ADD 9H means “add the data of memory location 9H with data
of accumulator and save the result in accumulator.
Suppose No. 2 is in the accumulator and No.3 is in memory
location 9H. Then ACC =0000 0010, RAM[9] = 0000
0011
During the execution of ADD 9H,
First data at RAM address 9 is loaded into the B register to get B = 0000 0011
and instantly the adder/subtracter forms the sum of A and B SUM = 0000 0101
Second, this sum is loaded into the accumulator to get ACC = 0000
0101
Similarly, the execution of ADD FH adds data at RAM address 15
to the accumulator and save the answer back in accumulator
overwriting the previous value.
The negative numbers are stored in 2’s complement form.
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SUB Instruction
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SUB 9H means “subtract the data of memory location 9H from
data of accumulator and save the result in accumulator.
Suppose No. 3 is in the accumulator and No.2 is in memory
location 9H. Then ACC =0000 0011, RAM[9] = 0000
0010
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OUT Instruction
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The instruction OUT tells the SAP-1 computer to
transfer the accumulator contents to the output port.
After OUT has been executed, you can see the answer
to the problem being solved on LEDs display.
OUT is complete by itself; that is, you do not have to
include an address when using OUT because the
instruction does not involve data in the memory.
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HLT Instruction
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HLT stands for halt. This instruction tells the computer
to stop processing data so it stops the clock.
HLT marks the end of a program, similar to the way a
period marks the end of a sentence.
You must use a HLT instruction at the end of every
SAP-1 program; otherwise, you get computer trash
(meaningless answers caused by runaway processing).
HLT is complete by itself; you do not have to include a
RAM word when using HLT because this instruction
does not involve the memory.
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Memory Reference Instructions
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LDA, ADD, and SUB are called memory-reference
instructions because they use data stored in the memory.
OUT and HLT, on the other hand, are not memory reference
instructions because they do not involve the data stored in
the memory.
Mnemonics
LDA, ADD, SUB, OUT, and HLT are the instruction set for
SAP-1. Abbreviated instructions like these are called
mnemonics (memory aids). Mnemonics are popular in
computer work because they remind you of the operation
that will take place when the instruction is executed.
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Program in Assembly Program in Machine Language
Address Contents Address Contents in Binary Contents in Hexadecimal
0H LDA 9H 0000 0000 1001 09H
1H ADD AH 0001 24
0001 1010 1AH
2H ADD CH 0010 0001 1100 1CH
3H SUB BH 0011 0010 1011 2BH
4H OUT 0100 1110 1111 EFH
5H HLT 0101 1111 1111 FFH
6H FFH 0110 1111 1111 FFH
7H FFH 0111 1111 1111 FFH
8H FFH 1000 1111 1111 FFH
9H 10H 1001 0001 0000 10H
AH 18H 1010 0001 1000 18H
BH 14H 1011 0001 0100 14H
CH 20H 1100 0010 0000 20H
DH FFH 1101 1111 1111 FFH
EH FFH 1110 1111 1111 FFH
FH
www.iiu.edu.pkFFH 1111 1111 1111 FFH 11/1/22
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0001
0000
0010
0011
0100 0000 1000
SAP-1
Simulation
0000 1000
of Program
LDA 9H 1111
0001 1111
0000
1110 1001
0101
1010
0011
ADD AH 1010
1001
OUT
0000
0001
1110
1111
HLT 08
Computer T321654
Halted 11/1/22
That’s all
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