Analog to Digital
Converters
Analog Signals
Analog signals – directly measurable quantities
in terms of some other quantity
Examples:
Thermometer – mercury height rises as
temperature rises
Car Speedometer – Needle moves farther
right as you accelerate
Stereo – Volume increases as you turn the
knob.
Digital Signals
Digital Signals – have only two states. For
digital computers, we refer to binary states, 0
and 1. “1” can be on, “0” can be off.
Examples:
Light switch can be either on or off
Door to a room is either open or closed
Examples of A/D Applications
Microphones - take your voice varying pressure waves in the
air and convert them into varying electrical signals
Strain Gages - determines the amount of strain (change in
dimensions) when a stress is applied
Thermocouple – temperature measuring device converts
thermal energy to electric energy
Voltmeters
Digital Multimeters
Just what does an
A/D converter DO?
Converts analog signals into binary words
ADC Conversion Process
Two main steps of process
1.Quantizing
2.Encoding
Analog-to-Digital Converter
Encoding
Sampling and
Hold
t
Input: Analog Signal t
Analog Digital Conversion
2-Step Process:
Quantizing - breaking down analog value in a
set of finite states
Encoding - assigning a digital word or
number to each state and matching it to the
input signal
Step 1: Quantizing
Output Discrete Voltage
Example: States Ranges (V)
You have 0-10V 0 0.00-1.25
signals. Separate them 1 1.25-2.50
into a set of discrete
2 2.50-3.75
states with 1.25V
increments. (How did 3 3.75-5.00
we get 1.25V? See 4 5.00-6.25
next slide…) 5 6.25-7.50
6 7.50-8.75
7 8.75-10.0
Quantizing
The number of possible states that the
converter can output is:
N=2n
where n is the number of bits in the AD converter
Example: For a 3 bit A/D converter, N=2 3=8.
Analog quantization size:
Q=(Vmax-Vmin)/N = (10V – 0V)/8 = 1.25V
Encoding
Output Output Binary Equivalent
Here we assign the States
digital value (binary 0 000
number) to each
1 001
state for the
computer to read. 2 010
3 011
4 100
5 101
6 110
7 111
Accuracy of A/D Conversion
There are two ways to best improve accuracy of
A/D conversion:
increasing the resolution which improves the
accuracy in measuring the amplitude of the
analog signal.
increasing the sampling rate which increases the
maximum frequency that can be measured.
Resolution
Resolution (number of discrete values the converter can
produce) = Analog Quantization size (Q)
(Q) = Vrange / 2^n, where Vrange is the range of analog
voltages which can be represented
limited by signal-to-noise ratio (should be around 6dB)
In our previous example: Q = 1.25V, this is a high
resolution. A lower resolution would be if we used a 2-bit
converter, then the resolution would be 10/2^2 = 2.50V.
ADC Process
Quantization & Coding
Use original analog 11
signal
10
Apply 2 bit coding
01
00
K=22 00
01
10
11
ADC Process
Quantization & Coding
Use original analog 11
signal
10
Apply 2 bit coding
01
00
K=22 00
01
10
11
ADC Process
Quantization & Coding
Use original analog
signal
Apply 3 bit coding
K=23 000
001
010
011
100
101
110
111
ADC Process
Quantization & Coding
Use original analog
signal
Apply 3 bit coding
Better representation
of input information with K=23 000 K=16 0000 K=…
additional bits 001
010
.
.
MCS12 has max of 10 011
100 1111
.
101
bits 110
111
ADC Process-Accuracy
The accuracy of an ADC can be improved by increasing:
t
Sampling Rate, Ts Resolution, Q
Based on number of steps
Improves accuracy in
required in the conversion
process measuring amplitude of
Increases the maximum analog signal
frequency that can be Limited by the signal-
measured to-noise ratio (~6dB)
ADC Process-Accuracy
The accuracy of an ADC can be improved by increasing:
t
Sampling Rate, Ts Resolution (bit depth),
Based on number of steps
required in the conversion Q
process Improves accuracy in
Increases the maximum
frequency that can be measuring amplitude of
measured analog signal
Sampling Rate
Frequency at which ADC evaluates analog signal. As we
see in the second picture, evaluating the signal more often
more accurately depicts the ADC signal.
Aliasing
Occurs when the input signal is changing much
faster than the sample rate.
For example, a 2 kHz sine wave being sampled
at 1.5 kHz would be reconstructed as a 500 Hz
(the aliased signal) sine wave.
Nyquist Rule:
Use a sampling frequency at least twice as high
as the maximum frequency in the signal to avoid
aliasing.
Overall Better Accuracy
Increasing both the sampling rate and the resolution
you can obtain better accuracy in your AD signals.
A/D Converter Types By Danny
Carpenter
Converters
Flash ADC
Delta-Sigma ADC
Dual Slope (integrating) ADC
Successive Approximation ADC
Flash ADC
Consistsof a series of comparators, each
one comparing the input signal to a unique
reference voltage.
The comparator outputs connect to the inputs
of a priority encoder circuit, which produces a
binary output
Flash ADC
How Flash Works
As the analog input voltage exceeds the
reference voltage at each comparator, the
comparator outputs will sequentially saturate
to a high state.
The priority encoder generates a binary
number based on the highest-order active
input, ignoring all other active inputs.
Flash ADC Example
Vin = 5.5V, Vref= 8V
0
Vin lies in between Vcomp5 & Vcomp6 0
Vcomp5 = Vref*5/8 = 5V
1
Vcomp6 = Vref*6/8 = 6V 1
1
Comparator 1 - 5 => output 1
Comparator 6 - 7 => output 0 1
5.5V 1
Encoder Octal Input = sum(0011111) = 5
Encoder Binary Output = 1 0 1
Flash
Advantages Disadvantages
Simplest in terms of
operational theory Lower resolution
Expensive
Most efficient in terms For each additional
of speed, very fast output bit, the number
limited only in terms of of comparators is
comparator and gate
propagation delays
doubled
i.e. for 8 bits, 256
comparators needed
Sigma Delta ADC
Over sampled input signal goes to the
integrator
Output of integration is compared to GND
Iterates to produce a serial bit stream
Output is serial bit stream with # of 1’s
proportional to Vin
SIGMA-DELTA ADC
CLOCK
fs
INTEGRATOR Kfs
VIN A
+ N-BITS
+ DIGITAL
FILTER
_ AND
_
DECIMATOR
fs
LATCHED
COMPARATOR
(1-BIT ADC)
B
+VREF
1-BIT,
1-BIT DATA Kfs
STREAM
1-BIT
DAC
–VREF
SIGMA-DELTA MODULATOR
SIGMA-DELTA ADC
SIGMA-DELTA ADC
Sigma-Delta
Advantages Disadvantages
High resolution Slow due to
oversampling
No precision external
components needed
Successive Approximation ADC By
Stephanie Pohl
A Successive Approximation Register (SAR)
is added to the circuit
Instead of counting up in binary sequence,
this register counts by trying all values of bits
starting with the MSB and finishing at the
LSB.
The register monitors the comparators output
to see if the binary count is greater or less
than the analog signal input and adjusts the
bits accordingly
Successive Approximation
ADC
Elements
• DAC = Digital to Analog Converter
• EOC = End of Conversion
• SAR = Successive Approximation Register
• S/H = Sample and Hold Circuit
• Vin = Input Voltage
• Comparator
• Vref = Reference Voltage
Successive Approximation
ADC
Algorithm
• Uses an n-bit DAC and original analog results
• Performs a binary comparison of VDAC and Vin
• MSB is initialized at 1 for DAC
• If Vin < VDAC (VREF / 2^n=1) then MSB is reset to 0
• If Vin > VDAC (VREF / 2^n) Successive Bits set to 1 otherwise 0
• Algorithm is repeated up to LSB
• At end DAC in = ADC out
• N-bit conversion requires N comparison cycles
Successive Approximation
ADC - Example DAC bit/voltage
5-bit ADC, Vin=0.6V, Vref=1V
Bit 4 3 2 1 0
Cycle 1 => MSB=1 Voltage .5 .25 .125 .0625 .03125
SAR = 1 0 0 0 0
VDAC = Vref/2^1 = .5 Vin > VDAC SAR unchanged = 1 0 0 0 0
Cycle 2
SAR = 1 1 0 0 0
VDAC = .5 +.25 = .75 Vin < VDAC SAR bit3 reset to 0 = 1 0 0 0 0
Cycle 3
SAR = 1 0 1 0 0
VDAC = .5 + .125 = .625 Vin < VDAC SAR bit2 reset to 0 = 1 0 0 0 0
Cycle 4
SAR = 1 0 0 1 0
VDAC = .5+.0625=.5625 Vin > VDAC SAR unchanged = 1 0 0 1 0
Cycle 5
SAR = 1 0 0 1 1
VDAC = .5+.0625+.03125= .59375
V >V SAR unchanged = 1 0 0 1 1
ADC Types Comparison
ADC Resolution Comparison
Dual Slope
Flash
Successive Approx
Sigma-Delta
0 5 10 15 20 25
Resolution (Bits)
Type Speed (relative) Cost (relative)
Dual Slope Slow Med
Flash Very Fast High
Successive Appox Medium – Fast Low
Sigma-Delta Slow Low
Successive Approximation
Example
10 bit resolution or
0.0009765625V of Vref
Vin= .6 volts
Vref=1volts
Find the digital value of
Vin
Successive Approximation
MSB (bit 9)
Divided Vref by 2
Compare Vref /2 with Vin
If Vin is greater than Vref /2 , turn MSB on (1)
If Vin is less than Vref /2 , turn MSB off (0)
Vin =0.6V and V=0.5
Since Vin>V, MSB = 1 (on)
Successive Approximation
Next Calculate MSB-1 (bit 8)
Compare Vin=0.6 V to V=Vref/2 + Vref/4= 0.5+0.25 =0.75V
Since 0.6<0.75, MSB is turned off
Calculate MSB-2 (bit 7)
Go back to the last voltage that caused it to be turned on
(Bit 9) and add it to Vref/8, and compare with Vin
Compare Vin with (0.5+Vref/8)=0.625
Since 0.6<0.625, MSB is turned off
Successive Approximation
Calculate the state of MSB-3 (bit 6)
Go to the last bit that caused it to be turned on (In
this case MSB-1) and add it to Vref/16, and
compare it to Vin
Compare Vin to V= 0.5 + Vref/16= 0.5625
Since 0.6>0.5625, MSB-3=1 (turned on)
Successive Approximation
This process continues for all the remaining
bits.
Successive Approximation
Advantages Disadvantages
Capable of high speed and Higher resolution
reliable successive approximation
Medium accuracy compared ADC’s will be slower
to other ADC types Speed limited to ~5Msps
Good tradeoff between
speed and cost
Capable of outputting the
binary number in serial (one
bit at a time) format.
Dual Slope A/D Converter
Also known as an Integrating ADC
+
_
Control
Logic
Start Stop
Cloc Counte
k r
Dual-Slope ADC – How It Works
An unknown input voltage is applied to the input of the integrator and
allowed to ramp for a fixed time period (tu)
Then, a known reference voltage of opposite polarity is applied to the
integrator and is allowed to ramp until the integrator output returns to zero
(td)
The input voltage is computed as a function of the reference voltage, the
constant run-up time period, and the measured run-down time period
The run-down time measurement is usually made in units of the converter's
clock, so longer integration times allow for higher resolutions
The speed of the converter can be improved by sacrificing resolution
td
Vin Vref
tu
Comparison of ADC’s
Speed Cost Resolution
Type
(relative) (relative) (bits)
Dual Slope Slow Med 12-16
Flash Very Fast High 4-12
Successive Medium –
Low 8-16
Approx Fast
Sigma –
Slow Low 12-24
Delta
Dual Slope Converter
Advantages Disadvantages
Input signal is averaged Slow
Greater noise immunity High precision external
than other ADC types components required to
High accuracy achieve accuracy
