Fundamentals of Computer Organization and
Architecture
Chapter Six
Central Processing Unit
Compiled By:- Weyessa A.
[email protected]
Outline
Central Processing Unit
General Register Organization
Stack Organization
Instruction Formats
Addressing modes
Data Transfer and Manipulation
Program Control
Characteristics of RISC and CISC
05/06/25 Fundamentals of Computer Organization and Architecture 2
Central Processing Unit
• CPU stands for Central Processing Unit; it is also known as "the brain of the
computer". A CPU is a primary component of a computer that performs most
of the processing and controls the operation of all components running
inside a computer. The key components of a CPU are the Control Unit, ALU
and Memory.
05/06/25 Fundamentals of Computer Organization and Architecture 3
Contd…
• The main part of the computer that performs the bulk of data-processing
operations is called the central processing unit and is referred to as the CPU.
The CPU is made up of three major parts, as shown in Figure.
The register set stores intermediate data used during the execution of the
instructions.
The arithmetic logic unit (ALU) performs the required microoperations
for executing the instructions.
The control unit supervises the transfer of information among the
registers and instructs the ALU as to which operation to perform.
05/06/25 Fundamentals of Computer Organization and Architecture 4
Stack Organization
A stack or last-in first-out (LIFO) is useful feature that is included in the
CPU of most computers.
Stack:
A stack is a storage device that stores information in such a manner that
the item stored last is the first item retrieved.
The operation of a stack can be compared to a stack of trays. The last tray
placed on top of the stack is the first to be taken off.
In the computer stack is a memory unit with an address register that can
count the address only.
The register that holds the address for the stack is called a stack pointer
(SP). It always points at the top item in the stack.
05/06/25 Fundamentals of Computer Organization and Architecture 5
Contd…
The two operations that are performed on stack are the insertion and
deletion.
The operation of insertion is called PUSH.
The operation of deletion is called POP.
These operations are simulated by incrementing and decrementing the
stack pointer register (SP).
05/06/25 Fundamentals of Computer Organization and Architecture 6
Cont…
Register Stack:
A stack can be placed in a portion of a large memory or it can be organized
as a collection of a finite number of memory words or registers.
The below figure shows the organization of a 64-word register stack.
The stack pointer register SP contains a binary number whose value is equal
to the address of the word is currently on top of the stack. Three items are
placed in the stack: A, B, C, in that order.
In above figure C is on top of the stack so that the content of SP is 3.
For removing the top item, the stack is popped by reading the memory
word at address 3 and decrementing the content of stack SP.
Now the top of the stack is B, so that the content of SP is 2.
05/06/25 Fundamentals of Computer Organization and Architecture 7
Cont…
Similarly for inserting the new item, the stack is pushed by incrementing SP
and writing a word in the nexthigher location in the stack.
In a 64-word stack, the stack pointer contains 6 bits because 26 = 64.
Since SP has only six bits, it cannot exceed a number greater than 63
(111111 in binary).
When 63 is incremented by 1, the result is 0 since 111111 + 1. = 1000000 in
binary, but SP can accommodate only the six least significant bits.
Then the one-bit register FULL is set to 1, when the stack is full.
Similarly when 000000 is decremented by 1, the result is 111111, and then
the one-bit register EMTY is set 1 when the stack is empty of items.
DR is the data register that holds the binary data to be written into or read
out of the stack.
05/06/25 Fundamentals of Computer Organization and Architecture 8
Cont…
Block diagram of a 64 word stack
Read about PUSH and POP!
05/06/25 Fundamentals of Computer Organization and Architecture 9
Contd…
Memory Stack:
In the above discussion a stack can exist as a stand-alone unit. But in the
CPU implementation of a stack is done by assigning a portion of memory to a
stack operation and using a processor register as stack pointer.
The below figure shows a portion computer memory partitioned into three
segments: program, data, and stack.
The program counter PC points at the address of the next instruction in
program.
The address register AR points at an array of data.
The stack pointer SP points at the top of the stack.
05/06/25 Fundamentals of Computer Organization and Architecture 10
Cont…
Computer memory with program, data, and stack segments
05/06/25 Fundamentals of Computer Organization and Architecture 11
Contd…
The three registers are connected to a common address bus, and either one
can provide an address for memory.
PC is used during the fetch phase to read an instruction.
AR is used during the exec phase to read an operand.
SP is used to push or pop items into or from stack.
As shown in Figure, the initial value of SP is 4001 and the stack grows with
decreasing addresses.
Thus the first item stored in the stack is at address 4000, the second item is
stored at address 3999, and the last address that can be used for the stack is
3000.
No provisions are available for stack limit checks.
05/06/25 Fundamentals of Computer Organization and Architecture 12
Instruction Formats
The format of an instruction is usually depicted in a rectangular box
symbolizing the bits of the instruction as they appear in memory words or in
a control register.
The bits of the instruction are divided into groups called fields.
The most common fields found in instruction formats are:
1. An operation code field that specifies the operation to be perform
2. An address field that designates a memory address or a processor register.
3.A mode field that specifies the way the operand or the effective address is
determined.
05/06/25 Fundamentals of Computer Organization and Architecture 13
Contd…
Computers may have instructions of several different lengths containing
varying number of addresses.
The number of address fields in the instruct format of a computer depends
on the internal organization of its registers.
Most computers fall into one of three types of CPU organizations:
1. Single accumulator organization.
2. General register organization.
3. Stack organization.
05/06/25 Fundamentals of Computer Organization and Architecture 14
Addressing Modes
The way the operands are chosen during program execution is dependent on
the addressing mode of the instruction.
Computers use addressing mode techniques for the purpose of
accommodating one or both of the following provisions:
• To give programming versatility to the user by providing such facilities as
pointers to memory, counters for loop control, indexing of data, and program
relocation.
• To reduce the number of bits in the addressing field of the instruction
Most addressing modes modify the address field of the instruction; there are
two modes that need no address field at all. These are implied and immediate
modes.
05/06/25 Fundamentals of Computer Organization and Architecture 15
Cont.…..
Implied Mode:
•In this mode the operands are specified implicitly in the definition of the
instruction.
•For example, the instruction "complement accumulator" is an implied-mode
instruction because the operand in the accumulator register is implied in the
definition of the instruction.
•All register reference instructions that use an accumulator are implied mode
instructions.
• Zero address in a stack organization computer is implied mode instructions.
05/06/25 Fundamentals of Computer Organization and Architecture 16
Cont.…..
Immediate Mode:
In this mode the operand is specified in the instruction itself.
In other words an immediate-mode instruction has an operand rather
than an address field.
Immediate-mode instructions are useful for initializing registers to a
constant value.
The address field of an instruction may specify either a memory word or a
processor register.
When the address specifies a processor register, the instruction is said to be in
the register mode.
05/06/25 Fundamentals of Computer Organization and Architecture 17
Data Transfer and Manipulation
Most computer instructions can be classified into three categories:
1.Data transfer instructions
2.Data manipulation instructions
3.Program control instructions
Data Transfer Instructions:
Data transfer instructions move data from one place in the computer to
another without changing the data content.
The most common transfers are between memory and processor registers,
between processor registers and input or output, and between the processor
registers themselves.
05/06/25 Fundamentals of Computer Organization and Architecture 18
Contd….
Data Manipulation Instructions:
Data manipulation instructions perform operations on data and provide the
computational capabilities for the computer.
The data manipulation instructions in a typical computer are usually
divided into three basic types:
•Arithmetic instructions
•Logical and bit manipulation instructions
•Shift instructions
05/06/25 Fundamentals of Computer Organization and Architecture 19
Program Control
Program control instructions specify conditions for altering the content of the
program counter.
The change in value of the program counter as a result of the execution of a
program control instruction causes a break in the sequence of instruction
execution.
This instruction provides control over the flow of program execution and a
capability for branching to different program segments.
Program Interrupt:- refers to the transfer of program control from a
currently running program to another service program as a result of an external
or internal generated request. The interrupt procedure is similar to a subroutine
call except for three variations:
The interrupt is initiated by an internal or external signal.
Address of the interrupt service program is determined by the hardware.
An interrupt procedure usually stores all the information rather than storing only PC
content.
05/06/25 Fundamentals of Computer Organization and Architecture 20
Cont…
Types of interrupts:
There are three major types of interrupts that cause a break in the normal execution of a
program. They can be classified as:-
External interrupts:
These come from input—output (I/O) devices, from a timing device, from a circuit
monitoring the power supply, or from any other external source.
Ex: I/O device requesting transfer of data, I/O device finished transfer of data, elapsed time
of an event, or power failure.
Internal interrupts:
These arise from illegal or erroneous use of an instruction or data.
Internal interrupts are also called traps.
Ex: interrupts caused by internal error conditions are register overflow, attempt to divide
by zero, an invalid operation code, stack overflow, and protection violation.
05/06/25 Fundamentals of Computer Organization and Architecture 21
Reduced Instruction Set Computer:
A computer with large number instructions is classified as a complex
instruction set computer, abbreviated as CISC.
The computer which having the fewer instructions is classified as a reduced
instruction set computer, abbreviated as RISC.
CISC Characteristics:
A large number of instructions--typically from 100 to 250 instructions.
Some instructions that perform specialized tasks and are used infrequently.
A large variety of addressing modes—typically from 5 to 20 differ modes.
Variable-length instruction formats
Instructions that manipulate operands in memory
05/06/25 Fundamentals of Computer Organization and Architecture 22
Cont.…
RISC Characteristics:
Relatively few instructions
Relatively few addressing modes
Memory access limited to load and store instructions
All operations done within the registers of the CPU
Fixed-length, easily decoded instruction format
Single-cycle instruction execution
Hardwired rather than microprogrammed control
A relatively large number of registers in the processor unit
Efficient instruction pipeline
05/06/25 Fundamentals of Computer Organization and Architecture 23
End Of Lecture Six.
THANK YOU!
05/06/25 Fundamentals of Computer Organization and Architecture 24
