Computer Organization
By: Dr. Umer Farooq
Fundamental Components
of Computer
The CPU (ALU, Control Unit, Registers)
The Memory Subsystem (Stored Data)
The I/O subsystem (I/O devices)
Address Bus
Data Bus Memory
CPU
Control Bus Subsystem
I/O Device
Subsystem 2
Each of these Components
are connected through
Buses.
BUS - Physically a set of wires. The
components of the Computer are
connected to these buses.
Address Bus
Data Bus
Control Bus
3
Address Bus
Used to specify the address of the
memory location to access.
Each I/O devices has a unique
address. (monitor, mouse, cd-rom)
CPU reads data or instructions
from other locations by specifying
the address of its location.
4
Data Bus
Actual data is transferred via the
data bus.
When the cpu sends an address to
memory, the memory will send
data via the data bus in return to
the cpu.
5
Control Bus
Collection of individual control signals.
Whether the cpu will read or write
data.
CPU is accessing memory or an I/O
device
Memory or I/O is ready to transfer
data
6
I/O Bus or Local Bus
In today’s computers the I/O
controller will have an extra bus
called the I/O bus.
The I/O bus will be used to access
all other I/O devices connected to
the system.
Example: PCI bus
7
Instruction Cycles
Procedure the CPU goes through to
process an instruction.
1. Fetch - get instruction
2. Decode - interperate the
instruction
3. Execute - run the instruction.
8
CPU organization
CPU controls the Computer
The CPU will fetch, decode and
execute instructions.
The CPU has three internal
sections:
– Register section,
– ALU, and
– Control Unit
9
Register Section
Includes collection of registers and a
bus.
Processor’s instruction set
architecture are found in this
section.
Non accessible registers by the
programmer. These are to be used
for registers to latch/handle the
address being accessed and a temp
storage register.
10
Arithmetic/Logic Unit (ALU)
Performs most Arithmetic and
logical operations.
Retrieves and stores its
information with the register
section of the CPU.
11
MEMORY ORGANIZATION
• Memory Hierarchy
• Main Memory
• Auxiliary Memory
• Associative Memory
• Cache Memory
• Virtual Memory
• Memory Management Hardware`
12
Memory
Main memory consists of a number of
storage locations, each of which is
identified by a unique address
The ability of the CPU to identify each
location is known as its addressability
Each location stores a word i.e. the
number of bits that can be processed by
the CPU in a single operation. Word
length may be typically 16, 24, 32 or as
many as 64 bits.
A large word length improves system
performance, though may be less efficient on
occasions when the full word length is not
used
13
Memory Hierarchy
MEMORY HIERARCHY
Memory Hierarchy is to obtain the highest possible
access speed while minimizing the total cost of the memory system
Auxiliary memory
Magnetic
tapes I/O Main
processor memory
Magnetic
disks
CPU Cache
memory
Register
Cache
Main Memory
Magnetic Disk
Magnetic Tape
14
Memory Subsystem
2 Types of Memory:
– ROM : Read Only Memory
Program that is loaded into memory and
cannot be changed also retains its data
even without power.
– RAM : Random Access Memory
Also called read/write memory. This type of
memory can have a program loaded and
then reloaded. It also loses its data with no
power.
15
Different ROM Chips
Masked ROM :
ROM that is programmed with data when
fabricated. Data will not change once installed.
Hardwired. (Network operating system, Server operating system)
Programmable ROM (PROM) :
Capable of being programmed by the user with
a ROM programmer. Not hardwired. (Old ROMs)
Erasable PROM (EPROM) :
Much like the PROM this EPROM can be
programmed and then erased by light.
(microcontroller and computer systems)
EEPROM :
Another form of EPROM but is reprogrammable
16
electrically. (Today’s ROM)
Different RAM Chips
Dynamic RAM (DRAM) :
Leaky capacitors. Caps are charged and
slowly leak until they are refreshed to
there original data locations. Ex.
Computer RAM
Static RAM (SRAM) :
Much like a register. The contents stay
valid and does not have to be refreshed.
SRAM is faster than DRAM but cost more
Ex. Cache
17
The operation of cache memory
1. Cache fetches data from 2. CPU checks to see
next to current addresses in whether the next instruction
main memory it requires is in cache
Cache
Main
Memory CPU
Memory
(SRAM)
(DRAM)
3. If it is, then the
4. If not, the CPU has to
instruction is fetched from
fetch next instruction from
the cache – a very fast
main memory - a much
position
slower process
= Bus connections 18
Addressing Modes
Immediate
Direct
Indirect
Register
Register Indirect
Displacement (Indexed)
Stack
19
Immediate Addressing
Operand is part of instruction
Operand = address field
e.g. ADD 5
– Add 5 to contents of accumulator
– 5 is operand
– No memory reference to fetch data
– Fast
– Limited range
20
Immediate Addressing
Diagram
Instruction
Opcode Operand
21
Direct Addressing
Address field contains address of
operand
e.g. ADD A
– Add contents of cell A to accumulator
– Look in memory at address A for
operand
Single memory reference to access
data
No additional calculations to work
out effective address
Limited address space
22
Direct Addressing Diagram
Instruction
Opcode Address A
Memory
Operand
23
Direct Addressing Diagram
Instruction
Opcode Address A
Memory
Operand
24
Indirect Addressing (1)
Memory cell pointed to by address
field contains the address of
(pointer to) the operand
Effective address (EA) = address
field (A)
EA = (A)
– Look in A, find address (A) and look
there for operand
e.g. ADD (A)
– Add contents of cell pointed to by
contents of A to accumulator 25
Indirect Addressing (2)
Large address space
2n where n = word length
May be nested, multilevel, cascaded
– e.g. EA = (((A)))
Draw the diagram yourself
Multiple memory accesses to find
operand
Hence slower
26
Indirect Addressing
Diagram
Instruction
Opcode Address A
Memory
Pointer to operand
Operand
27
Register Addressing (1)
Operand is held in register named
in address filed
EA = R
Limited number of registers
Very small address field needed
– Shorter instructions
– Faster instruction fetch
28
Register Addressing (2)
No memory access
Very fast execution
Very limited address space
Multiple registers helps
performance
– Requires good assembly
programming or compiler writing
29
Register Addressing
Diagram
Instruction
Opcode Register Address R
Registers
Operand
30
Register Indirect Addressing
Similar indirect addressing
EA = (R)
Operand is in memory cell pointed
to by contents of register R
Large address space (2n)
One fewer memory access than
indirect addressing
31
Register Indirect Addressing Diagram
Instruction
Opcode Register Address R
Memory
Registers
Pointer to Operand Operand
32
Displacement Addressing
EA = A + (R)
Address field hold two values
– A = base value
– R = register that holds displacement
or vice versa
33
Displacement Addressing Diagram
Instruction
Opcode Register R Address A
Memory
Registers
Pointer to Operand + Operand
34
Relative Addressing
A version of displacement
addressing
R = Program counter, PC
EA = A + (PC)
i.e. get operand from A cells from
current location pointed to by PC
35
Base-Register Addressing
A base address
SI holds displacement value
EA = A + SI
36
Indexed Addressing
A = base
R = displacement
EA = A + (R)
Good for accessing arrays
– EA = A + (R)
– R++
37
Stack Addressing
Operand is (implicitly) on top of
stack
e.g.
– ADD Pop top two items from stack
and add
38
Input-Output Organization
11-1 Peripheral Devices
– I/O Subsystem
Provides an efficient mode of
communication between the central
system and the outside environment
– Peripheral (or I/O Device)
Input or Output devices attached to the
computer
39
A synchronization mechanism may be needed
– The data transfer rate of peripherals is usually slower
than the transfer rate of the CPU
The operating modes of peripherals are different
from each other
– Each peripherals must be controlled so as not to disturb
the operation of other peripherals connected to the CPU
– Interface
Special hardware components between the CPU
and peripherals
Supervise and Synchronize all input and output
transfers I/ O bus
D ata
P ro c esso r Address
C o ntro l
Interfac e Interfac e Interfac e Interfac e
Keybo ard
and Magnetic Magnetic
P rinter
display disk tape
terminal
40
Input/output Devices
Input/output devices are required for
users to communicate with the
computer.
In simple terms, input devices bring
information INTO the computer and
output devices bring information OUT
of a computer system. These
input/output devices are also known as
peripherals.
41
Input Devices are:
Keyboard
Mouse
Joystick
Scanner
Light Pen
Touch Screen
42
Output devices are:
Printers
Plotters
Monitor
LCD
43
Thanks
44
