Chapter 5: Instruction Sets
Computer Architecture
and Organization
Department Computer Engineering
What is an Instruction Set?
The complete collection of instructions that are understood by a
CPU
Instructions are represented using machine Code, 1&0 which is
directly understood by the processor
The instructions tell the CPU what to perform
Usually represented by assembly codes due to ease of
understanding and writing programs for programmers relative to
machine codes
Assembly codes need to be translated in to machine code for
execution through assembler
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Elements of an Instruction
Operation code (Op code)
Which specifies the operation to be performed
Source Operand reference
which specifies the input locations for the operation
Destination Operand reference
which specifies the output locations for the operation, in some
instruction may specifies as an input and output location for the
operation
Next Instruction Reference
This tells the processor where to fetch the next instruction after the
execution of this instruction is complete, which is usually implicit
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Where have all the Operands Gone?
Source & result operands can be in one of four areas:
Main memory (or virtual memory or cache): As with next instruction
references, the main or virtual memory address must be supplied
Processor register: a processor may contains one or more registers
that may be referenced by machine instructions
If only one register exists, reference to it may be implicit
If more than one register exists, then each register is assigned a
unique name or number, and the instruction must contain the
number of the desired register
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Where have all the Operands Gone?
I/O device: The instruction must specify the I/O module and
device for the operation.
If memory-mapped I/O is used, this is just another main or
virtual memory address
Immediate: The value of the operand is contained in a field in the
instruction being executed.
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Instruction Representation
Within the computer, each instruction is represented by a sequence of bits
The instruction is divided into fields, corresponding to the constituent
elements of the instruction
With most instruction sets, more than one format is used
During instruction execution, an instruction is read into an instruction register
(IR) in the processor
The processor must be able to extract the data from the various instruction
fields to perform the required operation
It is difficult for both the programmer and the reader of textbooks to deal with
binary representations of machine instructions
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Instruction Representation
Therefore it is common practice to use a symbolic representation of machine
instructions
Opcodes are represented by abbreviations, called mnemonics, that indicate the
operation.
Common examples include:
Operands are also represented symbolically. For example, the instruction ADD
R,Y mean add the value contained in data location Y to the contents of register
R
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Instruction Representation
Y refers to the address of a location in memory, and R refers to a particular
register
Note: that the operation is performed on the contents of a location, not on its
address.
A simple instruction format is given below:
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Instruction Types
We can categorize instruction types as follows:
o Data processing: Arithmetic and logic instructions
o Data storage: Movement of data into or out of register and or
memory locations
o Data movement: I/O instructions
o Program flow control: Test & branch instructions
Arithmetic instructions provide computational capabilities for
processing numeric data
Logic (Boolean) instructions operate on the bits of a word as
bits rather than as numbers
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Instruction Types
I/O instructions are needed to transfer programs and data into
memory and the results of computations back out to the user.
Test instructions are used to test the value of a data word or
the status of a computation
Branch instructions are then used to branch to a different set
of instructions depending on the decision made
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Number of Addresses
Arithmetic and logic instructions will require the most operands
Virtually all arithmetic and logic operations are either unary (one
source operand) or binary (two source operands)
Thus, we need a maximum of two addresses to reference source
operands.
The result of an operation must be stored, suggesting a third
address, which defines a destination operand.
After completion of an instruction, the next instruction must be
fetched, and its address is needed.
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Number of Addresses
In most architectures, most instructions have one, two, or three
operand addresses, with the address of the next instruction being
implicit (obtained from the program counter).
Three-address instructions:
With three addresses, each instruction specifies two source
operand locations and a destination operand location.
Three-address instruction formats are not common because
they require a relatively long instruction format to hold the
three address references
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Number of Addresses
In most architectures, most instructions have one, two, or three
operand addresses, with the address of the next instruction being
implicit (obtained from the program counter).
Example: programs to execute the given expression using three
addresses
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Number of Addresses
Two address Instructions:
With two address instructions, and for binary operations, one
address must do double duty as both an operand and a result
The two-address format reduces the space requirement
To avoid altering the value of an operand, a MOVE instruction is
used to move one of the values to a result or temporary location
before performing the operation, E.g:
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Number of Addresses
One address Instructions:
In one-address instruction only the source or destination operand
specified in the instruction, a second address must be implicit
The implicit address being a processor register known as the
accumulator (AC).
The accumulator contains one of the operands and is used to
store the result.
Example:
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Number of Addresses
Zero address Instructions:
It is, possible to make do with zero addresses for some
instructions.
Zero-address instructions are applicable to a special memory
organization, called a stack.
A stack is a last-in-first-out set of locations.
The stack is in a known location and, often, at least the top two
elements are in processor registers
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Number of Addresses
Example:
o push a
o push b
o add (0 address instruction)
o pop c
After executing the last instruction the value of processor register c
becomes c= a+b which is fetched from the top of the stack which is
summed before these instruction.
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Summaries of zero, one ,two , three Address instruction
Fewer Addresses per instruction result in:
Requiring a less complex processor.
More instructions per program
Instructions of shorter length.
More addresses per instruction result in:
More complex instructions
Fewer instructions per program
Contain multiple general purpose registers
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Instruction Set Design
One of the most interesting, and most analyzed, aspects of computer design is
instruction set design
The design of an instruction set is very complex because it affects so many
aspects of the computer system
The instruction set defines many of the functions performed by the processor
and thus has a significant effect on the implementation of the processor
The instruction set is the programmer’s means of controlling the processor
Thus, programmer requirements must be considered in designing the
instruction set.
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Instruction Set Design
The most important of these fundamental design issues include the following:
Operation repertoire: How many and which operations to provide, and how
complex operations should be
Data types: The various types of data upon which operations are performed
Instruction format: Instruction length (in bits), number of addresses, size of
various fields, and so on
Registers: Number of processor registers that can be referenced by
instructions, and their use
Addressing: The mode or modes by which the address of an operand is
specified
These issues are highly interrelated and must be considered together in designing
an instruction set
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Types of Operand
Machine instructions operate on data. The most important general categories of
data are:
o Addresses: some calculation must be performed on the operand reference in an
instruction to determine the main or virtual memory address.
o Numbers: All machine languages include numeric data types such as binary
integer, binary floating point, and decimal
o Characters: character data can not be easily stored or transmitted by data
processing and communications systems, thus it must be converted to ASCII
code or others format for processing
o Logical Data: n-bit unit as consisting of n 1-bit items of data, each item having
the value 0 or 1, When data are viewed this way, they are considered to be
logical data
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Types of Operation
The number of different opcodes varies widely from machine to machine
However, the same general types of operations are found on all machines
Therefore they categorized as follows:
Data transfer
Arithmetic
Logical
Conversion
I/O
System control
Transfer of control
We will see later some of them in detail
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Data Transfer Instruction
Used to transfer data from one location to another, so it must specify:
The location of the source and destination operands must be specified
Each location could be memory, a register, or the top of the stack
The length of data to be transferred must be indicated
The mode of addressing for each operand must be specified, some examples
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Arithmetic Instruction
Most machines provide the basic arithmetic operations of add, subtract, multiply,
and divide.
The execution of an arithmetic instruction may involve data transfer operations to
position operands for input to the ALU, and to deliver the output of the ALU
The ALU portion of the processor performs the desired operation, some examples
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Logic Instruction
Most machines also provide a variety of operations for manipulating individual
bits of a word or other addressable units
Logical operations can be performed on Boolean or binary data
Logical operations can be applied bitwise to n-bit logical data units: Some
examples:
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Shift and Rotate Operations
In addition to bitwise logical operations, most machines provide a variety of
shifting and rotating functions.
With a logical shift, the bits of a word are shifted left or right
On one end, the bit shifted out is lost ,on the other end, a 0 is shifted in
Logical shifts are useful primarily for isolating fields within a word
The 0s that are shifted into a word displace unwanted information that is shifted
off the other end.
The arithmetic shift operation treats the data as a signed integer and does not
shift the sign bit
On a right arithmetic shift, the sign bit is replicated into the bit position to its
right
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Shift and Rotate Operations
On a left arithmetic shift, a logical left shift is performed on all bits but the
sign bit, which is retained
A right arithmetic shift corresponds to a division by 2, with truncation for
odd numbers
Both an arithmetic left shift and a logical left shift correspond to a
multiplication by 2 when there is no overflow
Rotate, or cyclic shift, operations preserve all of the bits being operated on.
One use of a rotate is to bring each bit successively into the leftmost bit,
where it can be identified by testing the sign of the data
As with arithmetic operations, logical operations involve ALU activity and
may involve data transfer operations
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Shift and Rotate Operations
Examples of Shift and Rotate
Operations
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Transfer of Control Instruction
Changing the normal sequence of instruction execution is known as transfer of
control
why transfer-of-control operations are required?
To execute an instruction more than once and perhaps many thousands of
times
In order to execute instruction based on decision making
To compose correctly a large or even medium-size computer program
The most common transfer-of-control operations found in instruction sets are:
branch, skip, and procedure call
BRANCH INSTRUCTIONS: A branch instruction, also called a jump
instruction, has as one of its operands the address of the next instruction to be
executed
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Transfer of Control Instruction
A branch instruction in which the branch is always taken is an unconditional
branch.
A branch instruction in which the branch is taken based on condition/decision is
conditional branch.
There are two common ways of generating the condition to be tested in a
conditional branch instruction
o First, most machines provide a 1-bit or multiple-bit condition code that is set as
the result of some operations
o As an example, an arithmetic operation could set a 2-bit condition code with
one of the following four values: 0, positive, negative, overflow
o On such a machine, there could be four different conditional branch instructions:
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Transfer of Control Instruction
o All of these cases, the result referred to is the result of the most recent operation
that set the condition code.
Another approach that can be used with a three-address instruction format is to
perform a comparison and specify a branch in the same instruction. For
example,
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Transfer of Control Instruction
Branch Instruction Example:
SKIP INSTRUCTIONS: Another form of transfer-of-control instruction is the
skip instruction.
The skip instruction includes an implied address.
Typically, the skip implies that one instruction be skipped; thus, the implied
address equals the address of the next instruction plus one instruction length.
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Transfer of Control Instruction
PROCEDURE CALL INSTRUCTIONS: A procedure is a self contained
computer program that is incorporated into a larger program
At any point in the program the procedure may be invoked, or called
The processor is instructed to go and execute the entire procedure and then
return to the point from which the call took place
The two principal reasons for the use of procedures are economy and
modularity
A procedure allows the same piece of code to be used many times
This is important for economy in programming effort and for making the most
efficient use of storage space in the system
The procedure mechanism involves two basic instructions: a call instruction
that branches from the present location to the procedure
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Transfer of Control Instruction
And a return instruction that returns from the procedure to the place from which
it was called, Examples given below for nested procedures
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Some Transfer of Control Instruction
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Addressing Modes
The address field or fields in a typical instruction format are
relatively small.
We would like to be able to reference a large range of locations in
main memory or, for some systems, virtual memory.
To achieve this objective, a variety of addressing techniques has
been employed
The most common addressing techniques are:
Immediate
Direct
Indirect
Register
Register Indirect
Displacement (Indexed)
Stack
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Immediate Addressing
In immediate addressing the operand value is present in the
instruction, so operand = address field
This mode can be used to define and use constants or set initial
values of variables
The advantage of immediate addressing mode is:
no memory reference other than the instruction fetch is required
to obtain the operand
Thus, saving one memory or cache cycle in the instruction cycle
Fast
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Immediate Addressing
Disadvantages of immediate addressing mode is:
The size of the number is restricted to the size of the address field
Because in most instruction sets, the address field length is small
compared with the word length.
Immediate addressing mode instruction format:
e.g. ADD 5, these instruction mean that:
Add 5 to contents of accumulator
5 is operand, thus the operand 5 present in the instruction representation
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Direct Addressing
The address field contains the effective address of the operand
Effective address (EA) = address field (A)
The technique was common in earlier generations of computers but
is not common on contemporary architectures.
e.g. ADD A
Add contents of cell A to accumulator
Look in memory at address A for operand
It requires only one memory reference and no special calculation to
find effective address
limitation is that it provides only a limited address space
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Direct Addressing Diagram
Instruction
Opcode Address A
Memory
Operand
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Indirect Addressing
With direct addressing, the length of the address field is usually less than the
word length, thus limiting the address range
One solution is to have the address field refer to the address of a word in
memory, which in turn contains a full-length address of the operand
EA = (A), mean that the effective address is the content located at memory
address A
The obvious advantage of this approach is that for a word length of N, an
address space of 2 raised to N is now available
The disadvantage is that instruction execution requires two memory references
to fetch the operand:
one to get its address and a second to get its value.
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Indirect Addressing Diagram
Instruction
Opcode Address A
Memory
Pointer to operand
Operand
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Register Addressing
Register addressing is similar to direct addressing
The only difference is that the address field refers to a register rather
than a main memory address
EA = address of Registers , so operand is located in registers
The advantages of register addressing are:
only a small address field is needed in the instruction ,and
no time-consuming memory references are required
The disadvantage of register addressing is that the address space is
very limited
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Register Addressing
The memory access time for a register internal to the processor is
much less than that for a main memory address
In register Addressing mode
No memory access
Very fast execution
Very limited address space
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Register Addressing Diagram
Instruction
Opcode Register Address R
Registers
Operand
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Register Indirect Addressing
Register indirect addressing is analogous to indirect addressing
except that the address field refers to a register not memory
location
EA = (R), means operand is in memory cell pointed to by contents
of register R
The address space limitation (limited range of addresses) of the
address field is overcome by having that field refer to a word
length location containing an address
Can access an address space (2n), n is the size of register
Register indirect addressing uses one less memory reference than
indirect addressing
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Register Indirect Addressing Diagram
Instruction
Opcode Register Address R
Memory
Registers
Pointer to Operand Operand
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Displacement Addressing
A very powerful mode of addressing combines the capabilities of direct
addressing and register indirect addressing
EA = A + (R)
Displacement addressing requires that the instruction have two address fields,
at least one of which is explicit
The value contained in one address field (value = A) is used directly
The other address field, or an implicit reference based on opcode, refers to a
register whose contents are added to A to produce the effective address.
The most common uses of displacement addressing:
Relative addressing
Base-register addressing, and Indexing addressing
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Displacement Addressing Diagram
Instruction
Opcode Register R Address A
Memory
Registers
Pointer to Operand + Operand
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Relative Addressing
Also called PC-relative addressing, the implicitly referenced register is the
program counter (PC).
the next instruction address (PC) is added to the address field (A) to produce
the EA, EA=A+(PC)
Address field of instruction contains displacement value
If most memory references are relatively near to the instruction being
executed, then the use of relative addressing saves address bits in the
instruction
i.e. get operand from location of memory pointed by the effective address(EA)
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Base-Register Addressing
The referenced register contains a main memory address, and the
address field contains a displacement
The register reference may be explicit or implicit
It is a convenient means of implementing segmentation
In some implementations, a single segment-base register is
employed and is used implicitly
In others, the programmer may choose a register to hold the base
address of a segment
A holds displacement
R holds pointer to base address
EA = A + (R)
e.g. segment registers in 80x86
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Indexed Addressing
The address field references a main memory address, and the
referenced register contains a positive displacement from that
address
EA = A + (R), where A is reference in address field and R is index
register
Used to provide an efficient mechanism for performing iterative
operations
Good for accessing arrays
EA = A + (R)
(R)++
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Stack Addressing
Stack is a reserved block of location.
Items are appended to the top of the stack so that, at any
given time, the block is partially filled
Associated with the stack a pointer whose value is address of
top of the stack.
The stack pointer is maintained in register
Thus, references to stack location in memory are in fact
register indirect addressing.
Instruction need not include a memory reference but
implicitly operate on the top of the stack.
e.g. ADD Pop top two items from stack and add them
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Instruction Formats
An instruction format defines the layout of the bits of an
instruction, in terms of its constituent fields
An instruction format must include an opcode and, implicitly or
explicitly, zero or more operands
The format must, implicitly or explicitly, indicate the addressing
mode for each operand
For most instruction sets, more than one instruction format is used
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Assembly Language
· Use hexadecimal rather than binary
· Code as series of lines
· Hex address and memory address
· Need to translate automatically using program
· Add symbolic names or mnemonics for instructions
· Three fields per line
· Location address
· Three letter Opcode
· If memory reference: address
· Need more complex translation program
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Program in: Binary Hexadecimal
Address Contents Address Contents
101 0010 0010 0000 0001 101 2201
102 0001 0010 0000 0010 102 1202
103 0001 0010 0000 0011 103 1203
104 0011 0010 0000 0100 104 3204
201 0000 0000 0000 0010 201 0002
202 0000 0000 0000 0011 202 0003
203 0000 0000 0000 0100 203 0004
204 0000 0000 0000 0000 204 0000
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Symbolic Program
Address Instruction
101 LDA 201
102 ADD 202
103 ADD 203
104 STA 204
201 DAT 2
202 DAT 3
203 DAT 4
204 DAT 0
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Symbolic Addresses
· First field (address) now symbolic
· Memory references in third field now symbolic
· Now have assembly language and need an assembler to
translate
· Assembler used for some systems programming
· Compliers
· I/O routines
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Assembler Program
Label Operation Operand
FORMUL LDA I
ADD J
ADD K
STA N
I DATA 2
J DATA 3
K DATA 4
N DATA 0
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End of Chapter 5
Computer Architecture
and Organization
Department Computer Engineering