Chapter 2:
THE MICROPROCESSOR AND ITS ARCHITECTURE
Contents To be covered
• Internal microprocessor architecture – micro-
architecture
• Von Neumann architecture
• Real mode memory addressing
• protected mode memory addressing
• Execution and bus interface units
Internal microprocessor architecture –
micro-architecture
• A microarchitecture (sometimes written as "micro-
architecture") is the digital logic that allows an
instruction set to be executed.
• It is the combined implementation of
• registers,
• memory,
• arithmetic logic units,
• multiplexers, and any other digital logic blocks.
• All of this, together, forms the processor.
Units of micro Architecture
1. Flags
• Are a group of individual Flip-flops.
• The flags are mainly associated with arithmetic and logic
operations.
• The flags will show either a logical (0 or 1) (i.e.) a set or
reset depending on the data conditions in accumulator or various
other registers.
• A flag is actually a latch which can hold some bits of
information.
• It alerts the processor that some event has taken place.
Flags OF Intel processors
• There 5 five flags
Carry flag
Parity flag
Auxiliary carry flag
Zero flag
Sign flag
1. Carry flag
• Consider two binary numbers.
• For example:
1100 0000
1000 0000
• When we add the above two numbers, a carry is
generated in the most significant bit.
Cont.….
• So, a ninth bit is generated due to the
carry.
• So how to accommodate 9th bit in an 8-
bit register?
• For this purpose, the Carry flag is used.
• The carry flag is set whenever a carry is
generated and reset whenever there is
no carry.
2. Auxiliary carry flag?
• But there is an auxiliary carry flag? What is the difference
between the carry flag and auxiliary carry flag?
e.g. 0000 0100,
0000 0101
• When we add both the numbers a carry is generated in the third
bit from the least significant bit.
• This sets the auxiliary carry flag.
• When there is no carry, the auxiliary carry flag is reset.
• So, whenever there is a carry in the most significant bit Carry
flag is set. While an auxiliary carry flag is set only when a carry
is generated in bits other than the most significant bit.
3. Parity Flags
• Checks whether it’s even or odd parity.
• This flag returns a 0 if it is odd parity and returns a 1 if it
is an even parity.
• Sometimes they are also called as parity bit which is
used to check errors while data transmission is
carried out.
4. Zero flag shows whether the output of the operation is 0 or
not.
• If the value of Zero flag is 0 then the result of operation is
not zero.
• If it is zero the flag returns value 1.
Cont..
5. Sign flag
• Shows whether the output of operation has
positive sign or negative sign.
• A value 0 is returned for positive sign and 1 is
returned for negative sign.
2. Instruction Register and Decoder
• Instruction register is 8-bit register just like every other
register of microprocessor.
• Consider an instruction, The instruction may be anything like
adding two data’s, moving a data, copying a data etc.
• When such an instruction is fetched from memory, it is
directed to Instruction register.
• So, the instruction registers are specifically to store the
instructions that are fetched from memory.
• There is an Instruction decoder which decodes the
information’s present in the Instruction register for
further processing.
3. Timing and Control Unit
• Is a very important unit as it synchronizes the
registers and flow of data through various
registers and other units.
• Consists of an oscillator and controller sequencer
which sends control signals needed for internal
and external control of data and other units.
• The oscillator generates two-phase clock
signals which aids in synchronizing all the
registers of 8085 microprocessor.
Cont.…
• Signals that are associated with Timing and
control unit are:
1. Control Signals: READY, RD’, WR’, ALE (enable
Address latch)
2. Status Signals: S0, S1, IO/M’
3. DMA Signals: HOLD, HLDA
4. RESET Signals: RESET IN, RESET OUT
4. Interrupt Control
• controls interrupts a process.
• Consider that a microprocessor is executing the main
program.
• Now whenever the interrupt signal is enabled or
requested the microprocessor shifts the control
from main program to process the incoming
request and after the completion of request, the
control goes back to the main program.
• For example, an Input/output device may send an
interrupt signal to notify that the data is ready for input.
Cont.…
• The microprocessor temporarily stops the execution
of main program and transfers control to I/O device.
• After collecting the input data, the control is transferred
back to main program.
• Interrupt signals present in 8085 are:
• INTR
• RST 7.5
• RST 6.5
• RST 5.5
• TRAP
Cont.…
• Interrupt can be classified as maskable and
non-maskable Interrupts
• maskable interrupt which is given the highest
priority in the order of interrupts.
E.G TRAP
• non-maskable Interrupts - can be disabled
and enabled using EI(Enable Interrupt) and
DI(Disable interrupt) instructions.
• INTR ,RST 7.5 ,RST 6.5,RST 5.5
5. Serial I/O control
• The input and output of serial data can be
carried out using 2 instructions in 8085.
1. SID-Serial Input Data
2. SOD-Serial Output Data
• Two more instructions are used to perform serial-
parallel conversion needed for serial I/O devices.
• SIM(Set interrupt mask )
• RIM(Read interrupt mask )
6. Address buffer and Address-Data
buffer
• The contents of the stack pointer and program counter are
loaded into the address buffer and address-data buffer.
• These buffers are then used to drive the external
address bus and address-data bus.
• As the memory and I/O chips are connected to these buses,
the CPU can exchange desired data to the memory and I/O
chips.
• The address-data buffer is not only connected to the external
data bus but also to the internal data bus which consists of 8-
bits.
• The address data buffer can both send and receive data from
internal data bus.
7. Address bus and Data bus:
• We know that 8085 is an 8-bit microprocessor. So, the data
bus present in the microprocessor is also 8-bits wide.
• So, 8-bits of data can be transmitted from or to the
microprocessor.
• But 8085 processor requires 16-bit address bus as the memory
addresses are 16-bit wide.
• The 8 most significant bits of the address are transmitted with
the help of address bus and the 8 least significant bits are
transmitted with the help of multiplexed address/data bus.
• This means for few microseconds, the 8 least significant bits of
address are generated, while for next few seconds the same
pin generates the data. This is called Time multiplexing.
2.2 Von Neumann architecture
• Von Neumann architecture was first published by John von
Neumann in 1945.
• His computer architecture design consists of
Control Unit,
Arithmetic and Logic Unit (ALU),
Memory Unit,
Registers and Inputs/Outputs.
• Von Neumann architecture is based on the stored-program
computer concept, where instruction data and program
data are stored in the same memory.
• This design is still used in most computers produced today.
Cont.…
• Central Processing Unit (CPU)
The Central Processing Unit (CPU) is the electronic
circuit responsible for executing the instructions of
a computer program.
It is sometimes referred to as the microprocessor
or processor.
The CPU contains the ALU, CU and a variety of
registers.
• Registers
Registers are high speed storage areas in the CPU.
All data must be stored in a register before it can
be processed.
Cont.…
• Arithmetic and Logic Unit (ALU)
• The ALU allows arithmetic (add, subtract etc.) and logic
(AND, OR, NOT etc.) operations to be carried out.
• Control Unit (CU)
• The control unit controls the operation of the
computer’s ALU, memory and input/output devices,
telling them how to respond to the program instructions
it has just read and interpreted from the memory unit.
• The control unit also provides the timing and control
signals required by other computer components.
Cont.…
• Buses
• Buses are the means by which data is transmitted from one part of a
computer to another, connecting all major internal components to the CPU
and memory.
• A standard CPU system bus is comprised of a control bus, data bus and
address bus.
• Address Bus
• Carries the addresses of data (but not the data) between the processor and
memory
• Data Bus
• Carries data between the processor, the memory unit and the input/output devices
• Control Bus Carries control signals/commands from the CPU (and status
signals from other devices) in order to control and coordinate all the
activities within the computer.
Cont..
• Memory Unit
• The memory unit consists of RAM, sometimes referred to as
primary or main memory.
• Unlike a hard drive (secondary memory), this memory is fast
and also directly accessible by the CPU.
• RAM is split into partitions. Each partition consists of an
address and its contents (both in binary form).
• The address will uniquely identify every location in the
memory.
• Loading data from permanent memory (hard drive), into the
faster and directly accessible temporary memory (RAM),
allows the CPU to operate much quicker.
2.3 Real mode memory addressing
• The 80286 and above operate in either the real or protected mode.
Only the 8086 and 8088 operate exclusively in the real mode.
• Real mode operation allows the microprocessor to address
only the first 1M byte of memory space-even if it is the
Pentium II microprocessor.
• Note that the first 1 M byte of memory is called either the real
memory or conventional memory system.
• The DOS operating system requires the microprocessor to operate
in the real mode.
• Real mode operation allows application software written for the
8086/8088, which contain only 1 M byte of memory, to function in
the 80286 and above without changing the software.
Cont..
• Real Mode Memory Addressing also called real
address mode, is an operating mode of 80286 and
later x86-compatible CPUs.
• Real mode is characterized by a 20 bit segmented
memory address space (giving exactly 1 MB of
addressable memory) and unlimited direct software
access to all memory, I/O addresses and peripheral
hardware.
• A combination of a segment address and an offset
address, access a memory location in the real mode.
Cont.…
• All real mode memory addresses must consist
of a segment address plus an offset address.
• The segment address, located within one of
the segment registers, defines the beginning
address of any 64K-byte memory segment.
• The offset address selects any location within
the 64K byte memory segment.
• Segments in the real mode always have a length
of 64K bytes
Cont..
• Because a real mode segment of memory is 64K in
length,
• once the beginning address is known, the ending
address is found by adding FFFFH.
• Some addressing modes combine more than one
register and an offset value to form an offset address.
• When this occurs, the sum of these values may exceed
FFFFH.
Cont..
• Default Segment Registers and Offset
Registers : IP Instruction Address SS: SP or
BP (base pointer)
• Stack Address DS: BX, DI Data address. ES:
DI String destination address.
2.4 protected mode memory addressing
• Protected mode memory addressing allows
access to data and programs located above
the first 1M byte of memory.
• Addressing this extended section of the
memory system requires a change to the
segment plus an offset addressing scheme
used with real mode memory addressing. ..
• . A 32-bit offset allows segments of up to 4G byte.
Cont.…
• Protected mode memory addressing
allows access to data and programs
located above the first 1M byte of
memory.
• Addressing this extended section of the
memory system requires a change to the
segment plus an offset addressing scheme
used with real mode memory addressing.
Cont.…
• One difference between real and
protected addressing mode is that the
segment address is no longer present in
the protected mode.
• The selector selects a descriptor from a descriptor table. •
2.5 Execution and bus interface units
• Intel 8086 contains two independent
Functional units:
• Bus Interface Unit (BIU)
• Execution Unit (EU)
1. Bus Interface Unit contains:
• Segment Registers
• Instruction Pointer
• 6-Byte Instruction Queue
Function of Bus Interface Unit
It handles transfer of data and addresses
b e t w e e n t h e p r o c e s s o r a n d m e m o r y / I O.
It reads data from memory and I/O devices.
It writes data to memory and I/O devices.
It computes and sends out addresses.
It fetches instruction codes.
2. Execution Unit contains:
I. General Purposes Registers
• There are four 16-bit general purpose registers:
• AX
• BX
• CX
• DX
• Each of these 16-bit registers are further
subdivided into two 8-bit registers.
Function of Execution Unit
It receives opcode of an instruction from the QUEUE.
It decodes it and then executes it.
It tells BIU where to fetch the instructions or data
from.
It contains the control circuitry to perform various
internal operations.
I t h a s 1 6 - b i t A LU , w h i c h c a n p e r f o r m a r i t h m e t i c a n d
logical operations on 8-bit as well as 16-bit data.
Cont..
• AX Re g i s t e r : AX register is also known as
accumulator register that stores operands for
a r i t h m e t i c o p e r a t i o n l i ke d i v i d e d , ro t a t e .
• B X Re g i s t e r : T h i s r e g i s t e r i s m a i n l y u s e d a s a b a s e
r e g i s t e r. I t h o l d s t h e s t a r t i n g b a s e l o c a t i o n o f a
memory region within a data segment.
• C X Re g i s t e r : I t i s d e fi n e d a s a c o u n t e r . I t i s
primarily used in loop instruction to store loop
c o u n t e r.
• D X Re g i s t e r : D X r e g i s t e r i s u s e d t o c o n t a i n I / O p o r t
address for I/O instruction.
Cont.….
II. Stack Pointer (stores top element in the stack)
III. Base Pointer used in memory address computation
IV. Index Registers
V. ALU
VI. Flag Register
VII. Instruction Decoder
VIII. Timing & Control Unit
