Codestin Search App

ice40-dev-image Public
iCE 40 Development Docker Image

digital-logic-and-computer-design/ice40-dev-image’s past year of commit activity

JavaScript 0 0 0 0 Updated Oct 4, 2025
digitaljs_code Public Forked from yuyichao/digitaljs_code

digital-logic-and-computer-design/digitaljs_code’s past year of commit activity

JavaScript 0 BSD-2-Clause 7 0 0 Updated Oct 4, 2025
digitaljs Public Forked from tilk/digitaljs
Teaching-focused digital circuit simulator

digital-logic-and-computer-design/digitaljs’s past year of commit activity

JavaScript 0 BSD-2-Clause 63 0 1 Updated Oct 4, 2025
vscode-riscv-venus-2 Public Forked from HeZeBang/vscode-riscv-venus
VS Code extension with the Venus RISC-V simulator

digital-logic-and-computer-design/vscode-riscv-venus-2’s past year of commit activity

TypeScript 0 MIT 23 0 0 Updated Oct 4, 2025
vscode-tasks-sidebar Public Forked from iulianraduat/vscode-tasks-sidebar
A Visual Studio Code extension to display all tasks recognized by VSCode in sidebar

digital-logic-and-computer-design/vscode-tasks-sidebar’s past year of commit activity

TypeScript 0 GPL-3.0 3 0 0 Updated Oct 3, 2025
picorv32 Public Forked from YosysHQ/picorv32
PicoRV32 - A Size-Optimized RISC-V CPU

digital-logic-and-computer-design/picorv32’s past year of commit activity

Verilog 0 ISC 912 0 0 Updated Jun 23, 2025
yosys-docker Public Forked from davidsiaw/yosys-docker
Automated dockerized oss-cad-suite

digital-logic-and-computer-design/yosys-docker’s past year of commit activity

Shell 0 2 0 0 Updated Jun 1, 2025
upduino-devcontainer Public
Development Container for the UPduino (iCE40 UP5k)

digital-logic-and-computer-design/upduino-devcontainer’s past year of commit activity

Python 0 MIT 0 0 0 Updated Mar 31, 2025
ice40-ledandkey Public
iCE40 driver for the LED & Key modules/boards (HW-154) based on the TM1638

digital-logic-and-computer-design/ice40-ledandkey’s past year of commit activity

SystemVerilog 0 MIT 0 0 0 Updated Mar 19, 2025
learn-fpga Public Forked from BrunoLevy/learn-fpga
Learning FPGA, yosys, nextpnr, and RISC-V

digital-logic-and-computer-design/learn-fpga’s past year of commit activity

C++ 0 BSD-3-Clause 323 0 0 Updated Feb 25, 2025

View all repositories

Provide feedback

Saved searches

Use saved searches to filter your results more quickly

digital logic and computer design

Popular repositories Loading

Repositories

Uh oh!

Uh oh!

Uh oh!

Uh oh!

Uh oh!

Uh oh!

Uh oh!

Uh oh!

Uh oh!

Uh oh!

People

Top languages

Uh oh!

Most used topics

Uh oh!