My project for Kaggle's WSDM 2025 cup. Big project where I fuze gemma2-9b and some feature engineering for sequence classification.

4-bit Huffman coding based file packer in DOS.

A very basic assembler for a custom built 4 Bit CPU at college.

td4 emulator on web

A 4-bit datapath implementation in Logisim focusing on conditional branching logic. Features a custom 12-bit Instruction Set Architecture (ISA) capable of absolute addressing and relative offsets for operations like BEQ and BGT.

Decodificador de pantalla de 7 segmentos (inverso) con Catodo común en base a una entrada de 4bit escrito en VHDL.

4bit Led Digital Tube Timer

Aims to emulate a 4-bit processor for testing purposes, designed for the course Fundamentals of Digital Systems Design of Leiden University.

A beginner-level project that implements a 4-bit Arithmetic Logic Unit (ALU) supporting basic operations like ADD, SUB, AND, OR, XOR, NOT, INC, and DEC. Simulated using SystemVerilog and ideal for learning digital design fundamentals.

This project demonstrates how to interface a 16x2 LCD with the PIC16F877A microcontroller in 4-bit mode. It displays two messages on the LCD: "EMBEDDED" on the first line and "SYSTEMS" on the second line.

4 bit ALU in verilog

Decodificador de pantalla de 7 segmentos Ánodo común en base a una entrada de 4bit escrito en VHDL.

a 4 bit TTL computer

Layout of 4bit Ripple Carry Adder formed using CMOS logic in gpdk180nm technology node done in Cadence Virtuoso with no DRC and LVS errors.

Simple emulator for 4-bit and 8-bit chips, with its own assembly language

A cycle-accurate VHDL model for COP400 devices

This emulates the 4bit computer and be able to run on the browser.

📚 This repository demonstrates how to interface a 16x2 alphanumeric LCD with the 8051 Microcontrollers (AT89S52) using Assembly Language Programming. The project is designed to showcase a practical example of sending data from the 8051 microcontroller to an LCD and includes Proteus simulation files for testing, modify, debug and visualization.

Mixed-precision quantization scheme (16/8/4bit mixed quantization) for the Wan2.2-Animate-14B model. Compresses the original 35GB base model to 17GB, balancing inference performance and model size.

Fused 4bit AdamW in Cuda