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OdysseyGuy/README.md

Hello, I’m OdysseyGuy

Website Email LinkedIn

About Me

Electronics and Communication Engineering student interested in hardware acceleration, digital signal processing, and FPGA-based design. Currently interning at the DSP Lab, Raman Research Institute (Prof. Prabu), developing MATLAB-based test-vector workflows for FPGA digital design verification.

Tools and Languages

c cplusplus python matlab git

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  1. teensy41_fw teensy41_fw Public

    Bare-Metal Firmware for Teensy 4.1

    C 1

  2. odysseyguy.github.io odysseyguy.github.io Public

    My Website

    HTML 2

  3. odyguy.nvim odyguy.nvim Public

    My neovim config files.

    Lua