Pinned Loading

1. pulp-platform/TeraNoC pulp-platform/TeraNoC Public

   An open-source hybrid Mesh–Crossbar NoC for scalable, low-latency shared-L1-memory clusters with thousands of cores.

   C 12 2

2. pulp-platform/pulp-c910 pulp-platform/pulp-c910 Public

   PULP C910, a superscalar out-of-order RISC-V core adapted from T-Head's openC910 (Alibaba Group) and integrated into the PULP ecosystem with several modifications.

   SystemVerilog 9 5

3. pulp-platform/mempool pulp-platform/mempool Public

   A 256-RISC-V-core system with low-latency access into shared L1 memory.

   C 306 57

4. OpenExSys_CoherentCache OpenExSys_CoherentCache Public

   OpenExSys_CoherentCache a directory-based MESI protocol coherent cache IP.

   SystemVerilog 15

5. OpenExSys_NoC OpenExSys_NoC Public

   OpenExSys_NoC a mesh-based network on chip IP.

   SystemVerilog 16

6. ORV32s ORV32s Public

   A 2-stage pipeline RISC-V scalar core for embedded and low-power controllers.

   C 1