PhD Candidate at University of Thessaly
Research Assistant at Circuits and Systems Lab UTH (CASlab)
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Circuits and Systems Lab UTH
- Volos, Greece
Popular repositories Loading
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Matrix-Vector-Multiplication
Matrix-Vector-Multiplication PublicThis is a project within the university lesson "SoC Design with CAD tools"
Verilog 1
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DHT22---XBEE-Communication
DHT22---XBEE-Communication PublicThis project implements a communication between a XBee programmable device and a DHT22 Temperature and Humidity Sensor using 1-Wire Protocol.
C 1
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Seven-Segment-Display
Seven-Segment-Display PublicThis project is part of the lesson CE469 Digital Systems Lab
Verilog
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VGA-Controller-Implementation
VGA-Controller-Implementation PublicA VGA Controller Implementation in Verilog
Verilog
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