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InnisChen / STRAIT-Self-Test-and-Self-Recovery-for-AI-Accelerator

This is my senior project. Aims to implement the AI accelerator self-test and self-recovery architecture proposed in the paper "STRAIT: Self-Test and Self-Recovery for AI Accelerator". STRAIT is a …

Verilog 5 Updated Oct 23, 2025

akira2963753 / Neural-Network-Implementation-on-FPGA

SystemVerilog 3 Updated Sep 3, 2025

ultraembedded / riscv

RISC-V CPU Core (RV32IM)

Verilog 1,603 275 Updated Sep 18, 2021

akira2963753 / Low-Cost-AI-Accelerator-Based-on-TPU

This is my senior project, we aim to design a Low-cost-AI-Accelerator based on Google's Tensor Processing Unit.

Verilog 13 Updated Dec 14, 2025