Vim configuration files for Nix http://nixos.org/nix

A book about how to write OS kernels in Rust easily.

A Clash GUI based on tauri. Supports Windows, macOS and Linux.

Let's write an OS which can run on RISC-V in Rust from scratch!

This project is derived from RePlAce(https://github.com/The-OpenROAD-Project/RePlAce)

A Rust port of shadowsocks

A riscv isa simulator in rust.

Hello, Flask!

DGN Code

HW Design: A Functional Approach

Open source implementation of a Verilog formatter

RISC-V Assembly code assembler package for Python.

A toy remote desktop implemented by python

木及简历，一款markdown的在线简历工具。

The pytorch implementation of DGN on grid world and Starcraft

Python wrapper for verilator model

Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.

A toy ray tracer in Rust

The OpenPiton Platform

The Ultra-Low Power RISC Core

NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers

Python wrapper to interact with TCL command line interfaces

A DSL for Systolic Arrays

NoCmodel is a Python module for Network-on-Chip modeling, with add-ons for simulation (functional or RTL) and code generation.