💻 Electronics Engineer | Computer Architecture Enthusiast | FPGA Developer
🔬 Passionate about low-level programming, hardware design, and how software talks to silicon.
🚀 Always building and trying to learn new things — from custom RISC-V CPUs and softcore subsystems to ML-powered embedded systems.
- 🖥 Computer Architecture – Designing CPUs, memory systems, and exploring reinforcement learning–based prefetching.
- 🔧 FPGA Development – Verilog/VHDL, SpinalHDL, SoC integration, memory controllers.
- 🧠 Embedded AI – Deploying ML models on resource-constrained devices for real-world applications.
- 🛰 High-Performance & Low-Latency Systems – Designing bare-metal CPUs to handle time-critical tasks efficiently.
Adaptive, hardware-friendly prefetching mechanism built in ChampSim using Q-learning and tile coding.
Learns stride, locality, and correlation patterns dynamically, without hardcoded switching between prefetchers.
Designed to be FPGA-friendly for potential real-world hardware integration.
Developed a softcore RISC-V CPU subsystem on the BeagleV-Fire FPGA, equivalent to the PRU on BeagleBone Black, optimized for ultra-low-latency I/O. Implemented in Verilog with Linux-accessible APIs for real-time peripheral control.
- Synapse32 – Open-source 32-bit single-cycle RISC-V CPU.
- BeagleV-Fire Softcore Subsystem – Low-latency I/O CPU equivalent to PRUs.
"Curiosity is my clock — it never stops ticking."