Usually tinkering with SystemVerilog or Emacs
EE specializing in digital board design and HDL design of FPGAs
- Lenexa, KS
Nicolas P. Rougier
rougier
Researcher in computational and cognitive neuroscience supporting open source, open access and open science.
@INRIA Bordeaux, France
Jeremiah Leary
jeremiah-c-leary
I am an HDL (VHDL and Verilog) developer interested in learning software so I can create HDL specific tools to ease the burden of developing HDL.
Collins Aerospace Cedar Rapids, Iowa
Ben Nuttall
bennuttall
Software engineer at @bbc. Former @raspberrypi Community Manager. Creator of @gpiozero and @piwheels. Into Python & Linux.
@bbc Manchester, UK
Jim Lewis
JimLewis
VHDL Verification Specialist, OSVVM author, VHDL Trainer (including on OSVVM), IEEE VHDL WG Chair, Yoga Teacher
SynthWorks / OSVVM Tigard, OR