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CRUVI Standard Specifications

Verilog 20 5 Updated May 6, 2024

Sample minimal Vivado project for Parallella FPGA

Tcl 45 24 Updated May 15, 2016

Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.

Tcl 42 21 Updated Sep 22, 2025

Common elements for FPGA Design (FIFOs, RAMs, etc.)

VHDL 39 23 Updated Feb 24, 2025

Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL

Python 112 15 Updated Jul 20, 2024

Z80 CPU for OpenFPGAs, with Icestudio

Assembly 88 17 Updated Jun 6, 2024

LimeSDR-Mini board FPGA project

Verilog 63 40 Updated Aug 27, 2022

80186 compatible SystemVerilog CPU core and FPGA reference design

C++ 408 59 Updated Mar 22, 2024

A Verilog implementation of DisplayPort protocol for FPGAs

Verilog 265 58 Updated Mar 15, 2019

Repository for FPGA projects

VHDL 60 37 Updated Dec 1, 2025

SPI Slave for FPGA in Verilog and VHDL

Verilog 219 75 Updated May 11, 2024

FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)

132 39 Updated Aug 14, 2025

NetFPGA-SUME public repository

113 49 Updated Mar 27, 2015

A DDR3 memory controller in Verilog for various FPGAs

Verilog 550 104 Updated Oct 10, 2021

Source for the "FPGAs?! Now What?" Book

VHDL 65 18 Updated Jun 19, 2014

FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de10-nano)

168 58 Updated Nov 12, 2025

SPI Master for FPGA - VHDL and Verilog

VHDL 320 100 Updated Aug 22, 2023

A collection of resources on FPGA devices and development in general

382 32 Updated May 25, 2017

An implementation of DisplayPort protocol for FPGAs

VHDL 301 50 Updated May 19, 2016

A book on using the Spartan 3E FPGA with VHDL, using the Papilio One or Digilent Basys2 boards

Shell 272 74 Updated Aug 22, 2014

Get started using Intel® FPGA tools on the Devcloud with tutorials, workshops, advanced courses, and sample projects built specifically for students, researchers, and developers. Visit our official…

C++ 123 63 Updated Jul 17, 2023

Package manager and build abstraction tool for FPGA/ASIC development

Python 1,383 268 Updated Jan 12, 2026

A huge collection of VHDL/Verilog open-source IP cores scraped from the web

561 163 Updated Jan 18, 2023

FPGA 101 lessons/labs

Python 402 64 Updated Jul 14, 2024

Verilog library for ASIC and FPGA designers

Verilog 1,389 299 Updated May 8, 2024

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

Verilog 842 202 Updated Apr 15, 2020

A self-contained online book containing a library of FPGA design modules and related coding/design guides.

HTML 461 49 Updated Sep 13, 2024

Modern embedded framework, using Rust and async.

Rust 8,631 1,329 Updated Jan 16, 2026

Sending raw data from the Digilent Arty FPGA board

VHDL 25 7 Updated Jun 8, 2016
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