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University of Electronic Science and Technology of China
- Sichuan,China
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16:24
(UTC +08:00) - https://www.uestc.edu.cn/
Highlights
- Pro
Stars
all-in-one integrated design,A Tvia Trueview5725 based upscaler/video converter board for retro gaming hardware,
MoBA: Mixture of Block Attention for Long-Context LLMs
🐳 Efficient Triton implementations for "Native Sparse Attention: Hardware-Aligned and Natively Trainable Sparse Attention"
Run Synopsys VCS in Docker, for ALL users on a shared server.
《互联网络原理与实践(中文翻译)》Principles and Practices of Interconnection Networks
My implementation of the original transformer model (Vaswani et al.). I've additionally included the playground.py file for visualizing otherwise seemingly hard concepts. Currently included IWSLT p…
Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
A minimal GPU design in Verilog to learn how GPUs work from the ground up
OpenSource GPU, in Verilog, loosely based on RISC-V ISA
Static recompilation of Majora's Mask (and soon Ocarina of Time) for PC (Windows/Linux/Mac)
PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.
An Arcade PC Controller for SDVX. At the same time, the scheme is compatible with O.N.G.E.K.I Controller and IIDX Controller.
Open-source high-performance RISC-V processor
Building a Nintendo Entertainment System in Verilog
🦄️ 🎃 👻 Clash Premium 规则集(RULE-SET),兼容 ClashX Pro、Clash for Windows 等基于 Clash Premium 内核的客户端。