The main theme of this pull request is optimizing memory allocations/deallocations. It was found while profiling that on average, 10-20 memory allocations/deallocations would occur per cycle. By reducing the no. of allocations, I hope to reduce cycle time.

New language features and smaller changes were preferred over big structural changes to improve performance.

• 6bf6aad ... 5410557 primarily change function parameters to accept const references. This allows them to accept both lvalue and rvalue references; avoiding a copy.

• member initializer list were also added/improved wherever possible. This change avoids having to a call the constructor of a member twice.

Several of these changes were suggested by the static analyzer CppCheck.

• b0c1773 uses a new C++17 method try_emplace to construct an element in place avoiding a copy. It also has better syntax to pass constructor arguments compared to pre C++17 methods that require std::piecewise_construct.

• 16f2758 changes getSupportedPorts to return a reference to a vector. The aarch64::Instruction class has a member vector that stores the ports, and it is alive for as long as the instruction instance is, hence we return a reference to it to avoid copying.

• a0aebb1 adds a new CMake flag SIMENG_OPTIMIZE. This flag turns on Link-Time Optimizations allowing the compiler to optimize across translation units. Additionally, on x86 systems, it sets the -march and -mtune compiler flags.

• 856dc96 overloads setMemoryAddresses to accept rvalue references. This overload can reuse the resources of its parameter. The vectors created in Instruction::generateAddresses are deleted at the end of function. This presents an opportunity to reuse resources.

• bea1f88 creates a new member flushed_ to avoid allocating a map every flush. The sets are still allocated/deallocated every flush, perhaps using a stack allocator here could be beneficial.

• f4a1dbb and ac83072 adds a second parameter capacity to the RegisterValue ctor that takes an array as a reference. In aarch64, FP, SVE and NEON instructions use the same register bank of 256 byte registers. The updated ctor makes it easier to create RegisterValue of the correct size.

  Instruction::execute was updated to use the new ctor. This avoids data copying and an extra ctor call at the end of the function when zero extending.

The RegisterValue class along with Instruction class are a major source of memory allocations. The next few commits focus on reducing it.

• b40fde0 experiments with using C++17's new std::unsynchronized_pool_resource. It is a general-purpose, non thread-safe memory pool implementation. However, it was abandoned as it was not implemented in LLVM/Clang.

• a068449 experiments with using raw pointers instead of shared_ptr. This required implementing copy and move constructors. This change resulted in a performance regression and was reverted.

• ee4ec4d and cbd0d39 implement a simple memory pool implementation that is based on a free list. Each node of the free list is stored in the free chunks of memory. The memory pool grows by a factor of 2 when exhausted.

• ce708b0 changes the predict and update functions in BranchPredictor to accept a reference to shared_ptr. This is to avoid the cost of atomic increment/decrement. The lifetime of the ptr is expected to out last predict and update, hence it is safe.