- Saint Petersburg, Russia
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SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.
ULPI Link Wrapper (USB Phy Interface)
STM32-style peripheral modules (GPIO, TIM, UART, etc.) and general graphic modules (drivers, algorithms ...) written in Verilog/Chisel/SpinalHDL with APB/AHB/AXI interfaces. Includes a RISC-V SoC e…
🧪 single header unit testing framework for C and C++
🌊 Digital timing diagram rendering engine
RISC-V implementation of RV32I for FPGA board Tang Nano 20K utilizing on-board burst SDRAM, flash and SD card
Si5351-Module-Clone with low PPM TCXO! Drop-in replacement for the Adafruit's Si5351 module. 3.3v ONLY!
🟢 super fast 🚀 and tiny 🐥 embedded device 𝘾 printf-like trace ✍ code, works also inside ⚡ interrupts ⚡ and real-time PC 💻 logging (trace ID visualization 👀)
SpinalHDL components for Corundum Ethernet
Zero-dependency single-file C header for VPX coding, a form of Arithmetic coding.
xoreaxeaxeax / movfuscator
Forked from Battelle/movfuscatorThe single instruction C compiler
A comparison of 1st and 2nd order sigma delta DAC for FPGA
A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog
A 32-point pipelined Fast Fourier transform processor, using single path delay architecture, and based on radix2-DIF(decimation-in-frequency) algorithm. The average SNR = 58.76.
imagemlt / DualDevourer
Forked from gehee/devourerThe RTL8812AU driver that simply devours its competitors,enable tx mode.master branch for termux and android-compat branch for APP|支持双向传输的安卓用户态8812au网卡驱动,master分支用于termux,android_compat分支用于安卓APP
A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video pipeline with remote connectivity. For Sony, Series7 & open …
micro read line library for small and embedded devices
upstream: https://github.com/sophgo/sophpi/tree/sg200x-evb