Thanks to visit codestin.com
Credit goes to github.com

Skip to content
View masterleego's full-sized avatar
💭
I may be slow to respond.
💭
I may be slow to respond.

Block or report masterleego

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. cocotb cocotb Public

    Forked from cocotb/cocotb

    cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

    Python 1

  2. fifo_syn_pkt fifo_syn_pkt Public

    I want to implement a fifo using the BRAM .

  3. corundum corundum Public

    Forked from corundum/corundum

    Open source, high performance, FPGA-based NIC

    Verilog

  4. SpinalHDL SpinalHDL Public

    Forked from SpinalHDL/SpinalHDL

    Scala based HDL

    Scala

  5. verilog-ethernet verilog-ethernet Public

    Forked from alexforencich/verilog-ethernet

    Verilog Ethernet components for FPGA implementation

    Verilog

  6. verilog-pcie verilog-pcie Public

    Forked from alexforencich/verilog-pcie

    Verilog PCI express components

    Verilog