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    • autocomp

      Public
      Autocomp: LLM-Driven Code Optimization for Tensor Accelerators
      Python
      02100Updated Oct 25, 2025Oct 25, 2025
    • radiance

      Public
      A Heterogeneous GPU Platform for Chipyard SoC
      Scala
      13400Updated Oct 24, 2025Oct 24, 2025
    • pyuartsi

      Public
      A standalone implementation of the Tethered Serial Interface (TSI) in Python.
      Python
      0610Updated Oct 22, 2025Oct 22, 2025
    • A submodule of Chipyard https://github.com/ucb-bar/chipyard
      HTML
      151941Updated Oct 22, 2025Oct 22, 2025
    • gemmini

      Public
      Berkeley's Spatial Array Generator
      Scala
      2211.1k9011Updated Oct 17, 2025Oct 17, 2025
    • FireMarshal workload for SPEC2017
      Python
      5821Updated Oct 16, 2025Oct 16, 2025
    • zephyr

      Public
      Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
      C
      8.1k000Updated Oct 16, 2025Oct 16, 2025
    • Model-predictive control for microcontrollers (fork mapping tinyMPC to gemmini or other HW accelerators)
      C++
      114900Updated Oct 13, 2025Oct 13, 2025
    • Software kernels for the Radiance GPU
      C++
      0100Updated Oct 12, 2025Oct 12, 2025
    • A submodule of Chipyard https://github.com/ucb-bar/chipyard
      HTML
      15101Updated Oct 11, 2025Oct 11, 2025
    • hammer

      Public
      Hammer: Highly Agile Masks Made Effortlessly from RTL
      Python
      6829920718Updated Oct 10, 2025Oct 10, 2025
    • Pure digital components of a UCIe controller
      Scala
      13742817Updated Oct 9, 2025Oct 9, 2025
    • chipyard

      Public
      An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
      Scala
      7742k15523Updated Oct 9, 2025Oct 9, 2025
    • shuttle

      Public
      A Rocket-based RISC-V superscalar in-order core
      Scala
      53511Updated Oct 5, 2025Oct 5, 2025
    • IsaacLab

      Public
      Unified framework for robot learning built on NVIDIA Isaac Sim
      Python
      2.5k000Updated Oct 4, 2025Oct 4, 2025
    • Chisel RISC-V Vector 1.0 Implementation
      Assembly
      1811580Updated Oct 4, 2025Oct 4, 2025
    • Python
      1200Updated Oct 1, 2025Oct 1, 2025
    • xrsight

      Public
      A hardware–software co-design framework for developing and characterizing extended reality (XR) workloads on embedded systems-on-chip (SoCs).
      0000Updated Sep 25, 2025Sep 25, 2025
    • Scala
      96350183Updated Sep 12, 2025Sep 12, 2025
    • Codebase used for Berkeley Humanoid Lite teleoperation demonstration.
      Python
      1100Updated Sep 11, 2025Sep 11, 2025
    • Wrapper for ETH Ariane Core
      Scala
      192110Updated Sep 2, 2025Sep 2, 2025
    • Wraps the NVDLA project for Chipyard integration
      Verilog
      112150Updated Sep 2, 2025Sep 2, 2025
    • Chisel wrapper for the SpinalHDL VexiiRiscv CPU implementation, implementing Chipyard compatibility
      Scala
      0200Updated Sep 1, 2025Sep 1, 2025
    • educational microarchitectures for risc-v isa
      Scala
      159720140Updated Sep 1, 2025Sep 1, 2025
    • Wrapper for lowRISC Ibex
      Scala
      4500Updated Sep 1, 2025Sep 1, 2025
    • Scala
      61100Updated Sep 1, 2025Sep 1, 2025
    • Tool for converting PyTorch models into raw C codes with minimal dependency and some performance optimizations.
      C
      74341Updated Sep 1, 2025Sep 1, 2025
    • Scala
      21401Updated Aug 31, 2025Aug 31, 2025
    • SystemVerilog
      1210Updated Aug 31, 2025Aug 31, 2025
    • mempress

      Public
      C
      2200Updated Aug 31, 2025Aug 31, 2025