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@vlsi-lab VLSI lab - PoliTO

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    32 repositories

    • VLSPQC

      Public
      C
      •
      Apache License 2.0
      •0•0•0•0•Updated Feb 19, 2026Feb 19, 2026

    • cva6

      Public
      The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of bo…
      Assembly
      •
      Other
      •883•1•0•0•Updated Feb 18, 2026Feb 18, 2026

    • keccak

      Public
      SystemVerilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Feb 2, 2026Feb 2, 2026

    • Mage-and-Rogue

      Public
      Template-based CGRA allowing for generating GeMM CGRA with internal memory (Mage) and DMA-coupled streaming CGRA (Rogue)
      Python
      •
      Other
      •0•7•0•0•Updated Jan 30, 2026Jan 30, 2026

    • compact-yet-fast-ascon

      Public
      SystemVerilog RTL of a compact, d-order masked ASCON with reconfigurable masking for higher throughput.
      SystemVerilog
      •0•0•0•0•Updated Jan 16, 2026Jan 16, 2026

    • Qoolchain

      Public
      Python
      •
      MIT License
      •1•0•0•0•Updated Dec 18, 2025Dec 18, 2025

    • HORCRUX

      Public
      C
      •
      Apache License 2.0
      •1•5•0•0•Updated Nov 17, 2025Nov 17, 2025

    • ATHOS

      Public
      Assembly
      •
      Other
      •0•0•0•0•Updated Oct 29, 2025Oct 29, 2025

    • CHIMERA

      Public
      Apache License 2.0
      •0•0•0•0•Updated Oct 29, 2025Oct 29, 2025

    • len5

      Public
      LEN5 is a configurable, speculative, out-of-order, 64-bit RISC-V microprocessor targetting etherogeneus systems on chip.
      cpurisc-v
      SystemVerilog
      •
      Other
      •5•19•0•1•Updated Oct 22, 2025Oct 22, 2025

    • png2gds

      Public
      Convert a PNG image into a GDSII cell made of a grid of rectangles on a single layer.
      Python
      •
      GNU General Public License v3.0
      •0•3•0•0•Updated Oct 10, 2025Oct 10, 2025

    • TestIt

      Public
      A tool for verifying RTL and FPGA models using custom SW applications
      fpgatestrtl
      Python
      •
      GNU General Public License v3.0
      •0•4•0•0•Updated Oct 7, 2025Oct 7, 2025

    • area-plot-post-syn

      Public
      Python
      •0•4•0•0•Updated Sep 17, 2025Sep 17, 2025

    • SAURIA-CHESHIRE

      Public
      This project aims at building a demonstrator for the ISOLDE project by integrating the SAURIA Systolic Array in PULP's Cheshire MCU
      C
      •
      Other
      •2•1•0•0•Updated Aug 29, 2025Aug 29, 2025

    • KRONOS

      Public
      0•0•0•0•Updated Jul 24, 2025Jul 24, 2025

    • keccak_integration

      Public
      Other
      •0•1•0•0•Updated Jul 24, 2025Jul 24, 2025

    • KALIPSO

      Public
      Assembly
      •
      Other
      •1•3•0•0•Updated Jul 23, 2025Jul 23, 2025

    • LOKI

      Public archive
      Assembly
      •
      Other
      •0•0•0•0•Updated Jul 22, 2025Jul 22, 2025

    • power-logger

      Public
      High-resolution power logger for Xilinx ZCU102/ZCU106 via Arduino Nano BLE & on-board INA226
      Python
      •
      GNU General Public License v3.0
      •1•0•0•0•Updated Jul 16, 2025Jul 16, 2025

    • keccak32

      Public
      C
      •
      Apache License 2.0
      •0•0•0•0•Updated Jun 29, 2025Jun 29, 2025

    • llvm-project

      Public
      The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
      LLVM
      •
      Other
      •16k•0•0•1•Updated May 22, 2025May 22, 2025

    • rv_profile

      Public
      Visualize what your RISC-V core is executing
      profiletraceflamegraphrisc-vopenhwgroupcv32e40x
      HTML
      •2•2•0•0•Updated May 2, 2025May 2, 2025

    • ARCANE_OSHW25

      Public
      Python
      •0•1•0•0•Updated Apr 9, 2025Apr 9, 2025

    • x-heep-docker

      Public
      This repository contains the dockerfile to build the X-HEEP docker
      Makefile
      •3•0•1•2•Updated Mar 17, 2025Mar 17, 2025

    • TRNG

      Public
      Python
      •1•5•0•0•Updated Mar 7, 2025Mar 7, 2025

    • ATHOS_doc

      Public
      0•2•0•0•Updated Sep 10, 2024Sep 10, 2024

    • MARLIN

      Public
      MARLIN: a Co-design Methodology for Approximate ReconfigurabLe Inference of Neural Networks at the Edge
      Python
      •
      MIT License
      •3•6•0•0•Updated Aug 21, 2024Aug 21, 2024

    • x-heep

      Public
      eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V
      C
      •
      Other
      •130•0•0•0•Updated Feb 17, 2024Feb 17, 2024

    • cv32e40x

      Public
      4 stage, in-order, compute RISC-V core based on the CV32E40P
      SystemVerilog
      •
      Other
      •58•0•0•0•Updated Nov 13, 2023Nov 13, 2023

    • pulp_soc

      Public
      pulp_soc is the core building component of PULP based SoCs
      Shell
      •
      Other
      •90•0•0•0•Updated Sep 20, 2023Sep 20, 2023