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    • VLSPQC

      Public
      C
      0000Updated Feb 19, 2026Feb 19, 2026
    • cva6

      Public
      The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of bo…
      Assembly
      883100Updated Feb 18, 2026Feb 18, 2026
    • keccak

      Public
      SystemVerilog
      0000Updated Feb 2, 2026Feb 2, 2026
    • Template-based CGRA allowing for generating GeMM CGRA with internal memory (Mage) and DMA-coupled streaming CGRA (Rogue)
      Python
      0700Updated Jan 30, 2026Jan 30, 2026
    • SystemVerilog RTL of a compact, d-order masked ASCON with reconfigurable masking for higher throughput.
      SystemVerilog
      0000Updated Jan 16, 2026Jan 16, 2026
    • Qoolchain

      Public
      Python
      1000Updated Dec 18, 2025Dec 18, 2025
    • HORCRUX

      Public
      C
      1500Updated Nov 17, 2025Nov 17, 2025
    • ATHOS

      Public
      Assembly
      0000Updated Oct 29, 2025Oct 29, 2025
    • CHIMERA

      Public
      0000Updated Oct 29, 2025Oct 29, 2025
    • len5

      Public
      LEN5 is a configurable, speculative, out-of-order, 64-bit RISC-V microprocessor targetting etherogeneus systems on chip.
      SystemVerilog
      51901Updated Oct 22, 2025Oct 22, 2025
    • png2gds

      Public
      Convert a PNG image into a GDSII cell made of a grid of rectangles on a single layer.
      Python
      0300Updated Oct 10, 2025Oct 10, 2025
    • TestIt

      Public
      A tool for verifying RTL and FPGA models using custom SW applications
      Python
      0400Updated Oct 7, 2025Oct 7, 2025
    • Python
      0400Updated Sep 17, 2025Sep 17, 2025
    • This project aims at building a demonstrator for the ISOLDE project by integrating the SAURIA Systolic Array in PULP's Cheshire MCU
      C
      2100Updated Aug 29, 2025Aug 29, 2025
    • KRONOS

      Public
      0000Updated Jul 24, 2025Jul 24, 2025
    • 0100Updated Jul 24, 2025Jul 24, 2025
    • KALIPSO

      Public
      Assembly
      1300Updated Jul 23, 2025Jul 23, 2025
    • LOKI

      Public archive
      Assembly
      0000Updated Jul 22, 2025Jul 22, 2025
    • High-resolution power logger for Xilinx ZCU102/ZCU106 via Arduino Nano BLE & on-board INA226
      Python
      1000Updated Jul 16, 2025Jul 16, 2025
    • keccak32

      Public
      C
      0000Updated Jun 29, 2025Jun 29, 2025
    • The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
      LLVM
      16k001Updated May 22, 2025May 22, 2025
    • Visualize what your RISC-V core is executing
      HTML
      2200Updated May 2, 2025May 2, 2025
    • Python
      0100Updated Apr 9, 2025Apr 9, 2025
    • This repository contains the dockerfile to build the X-HEEP docker
      Makefile
      3012Updated Mar 17, 2025Mar 17, 2025
    • TRNG

      Public
      Python
      1500Updated Mar 7, 2025Mar 7, 2025
    • ATHOS_doc

      Public
      0200Updated Sep 10, 2024Sep 10, 2024
    • MARLIN

      Public
      MARLIN: a Co-design Methodology for Approximate ReconfigurabLe Inference of Neural Networks at the Edge
      Python
      3600Updated Aug 21, 2024Aug 21, 2024
    • x-heep

      Public
      eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V
      C
      130000Updated Feb 17, 2024Feb 17, 2024
    • cv32e40x

      Public
      4 stage, in-order, compute RISC-V core based on the CV32E40P
      SystemVerilog
      58000Updated Nov 13, 2023Nov 13, 2023
    • pulp_soc

      Public
      pulp_soc is the core building component of PULP based SoCs
      Shell
      90000Updated Sep 20, 2023Sep 20, 2023