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@ThePrimeagen
ThePrimeagen ThePrimeagen

CEO Of TheStartup 9th Ring, Vim

@librelane
LibreLane librelane
Repositories for the LibreLane ASIC Implementation Flow
@geohot
George Hotz geohot
We will commoditize the petaflop.

@commaai @tinygrad San Diego, CA

@stefanpie
Stefan Abi-Karam stefanpie
🐝 Graduate Student + Research Faculty at Georgia Tech - ✨ I Work On AI for Chip Design Research

Atlanta, GA, USA

@fpganinja
fpganinja

United States of America

@tuanpmt
Tuan tuanpmt

Ho Chi Minh, Vietnam

@jerryz123
Jerry Zhao jerryz123
Computer Architect at OpenAI. Ex-Cal

OpenAI SF Bay

@lowRISC
lowRISC lowRISC
Developing the Silicon Commons
@SystemRDL
SystemRDL SystemRDL
Free & open-source SystemRDL tools
@verilator
Verilator verilator
Verilator Open-Source SystemVerilog simulator and lint system
@racerxdl
Lucas Teske racerxdl
I am because we are.

@tesmustech São Paulo, SP, Brasil

@carlosedp
Carlos Eduardo carlosedp
Check my articles on https://carlosedp.medium.com and support me at https://github.com/sponsors/carlosedp

RISC-V Ambassador / Red Hat Architect / Independent Developer Sao Paulo/Brazil

@The-OpenROAD-Project
The OpenROAD Project The-OpenROAD-Project
OpenROAD seeks to develop and foster an autonomous, 24-hour, open-source layout generation flow (RTL-to-GDS).

United States of America

@karpathy
Andrej karpathy
I like to train Deep Neural Nets on large datasets.

Stanford

@splinedrive
splinedrive splinedrive
M.Sc.CE. , Technical University of Berlin

Berlin, Germany

@jamieiles
Jamie Iles jamieiles
Software engineer, FPGA tinkerer

Qualcomm/NUVIA Bristol, England

@FavioVazquez
Favio André Vázquez FavioVazquez
Physicist and computational engineer. I have a passion for science, philosophy, programming, and lacanian psychoanalysis. Working on cosmology and big data.

Life México

@mithro
Tim 'mithro' Ansell mithro
Founder and Leader of @timvideos

@wafer-space Adelaide, Australia

@avpatel
Anup Patel avpatel
Hypervisor and Linux Kernel Contributor

Bangalore, India

@enjoy-digital
enjoy-digital

EnjoyDigital France

@cuonghle
Cuong H. Le cuonghle
I'm Design Verification engineer at Marvell Semiconductor company.

Marvell Semiconductor

@clairexen
Claire Xen clairexen
Claire Xenia Wolf

@YosysHQ Vienna

@j-marjanovic
Jan Marjanovic j-marjanovic

Atom Computing Berkeley (CA), USA

@taichi-ishitani
Taichi Ishitani taichi-ishitani

@pezy-computing Kanagawa, Japan

@ultraembedded
ultraembedded
CPU designs, digital HW IP, emulation and embedded system projects

UK

@vpetry
Vilson Petry vpetry
Verification Engineer

Porto Alegre - Brazil

@TheOfficialFloW
Andy Nguyen TheOfficialFloW
Information Security Engineer

Zurich

@ZipCPU
Dan Gisselquist ZipCPU

Gisselquist Technology, LLC

@onchipuis
OnchipUIS onchipuis
Not a typical research group, we are makers of IDEAS and THINGS. Ideas that you can test. High-Speed interfaces, A-MS circuits and biomedical systems.

Universidad Industrial de Santander Bucaramanga, Santander, Colombia

@sergioprado
Sergio Prado sergioprado

Embedded Labworks São Paulo/Brazil

@EspressifSystems
ESP8266 EspressifSystems

Espressif Systems Shanghai, China

@torvalds
Linus Torvalds torvalds

Linux Foundation Portland, OR