This repository contains a collection of approximate arithmetic units for use in various digital designs. The units are written in Chisel with tests written for the exact units using ChiselSim. Currently only a selection of adders and multipliers and a simple sequential division unit are included - more designs to come!

When you use this library in a research project, please cite it as:

@misc{damsgaard2022approx,
  title={{approx: A Library of Approximate Arithmetic Units in Chisel}},
  author={Damsgaard, Hans Jakob},
  year={2022},
  howpublished={\url{https://github.com/aproposorg/approx}}}

This README only contains a brief overview of the library's current contents. All units are commented to be reasonably understandable for people with prior knowledge of Chisel and Scala. Refer to the Digital Design with Chisel book for more details on these topics.

Utilizing Chisel and ChiselSim, approx requires a suitable installation of Scala. For this purpose, we use the Scala Build Tool (sbt) for which we provide a suitable build script. The provided tests require a recent version of Verilator.

This library is tested in Ubuntu 24.04 with Verilator 5.032. Note that the default Verilator version (5.020) available through apt in Ubunty 24.04 is not new enough. If you wish to have VCD dumps from the simulations, pass the emitVcd flag to testOnly, for example:

sbt "testOnly approx.addition.RCASpec -- -DemitVcd=1"

The approx.addition library contains a vast number of approximate and exact adder designs that are parameterized to be reasonably flexible. The lists below specify which designs are included currently. We gladly accept requests for other designs as issues in this repository.

All exact designs are based on descriptions in Ercegovac and Lang's book on digital arithmetic.

Beware that some approximate adders (e.g., DualModeRCA, GeAr) do not extend the abstract Adder base class as their IOs do not match those of the basic adder. Almost all designs are purely combinational; only GeAr has an option for adding a register to support flagging errors.

Like above, the approx.multiplication library contains several approximate and exact multiplier designs that are also parameterized. The list below specifies which designs are included currently. In addition to these, the tool also includes a generic compressor tree generator for ASIC, Xilinx 7-Series/UltraScale or Versal FPGA (supported by the primitives in approx.util.Xilinx), and Intel FPGA flows. The generator supports fully exact compression as well as approximation by column or row truncation, OR-based column compression, and miscounting (i.e., inexact compression). Multiple of these approximations can also be applied concurrently.

All exact designs are based on descriptions in Ercegovac and Lang's book on digital arithmetic. Note that some exact multiplier implementations, specifically Radix2Multiplier, Radix4Multiplier, RecursiveMultiplier, and AdaptiveRadix2Multiplier, permit approximation through their arguments.

The approx.division library currently only contains an exact, sequential radix-2 divider. We hope to extend this collection in the future.

N/A

The approx.accumulation library currently only contains a number of exact, non-pipelined single-lane and parallel accumulators with options for the parallel designs to be approximated with the custom compressor trees from approx.multiplication.comptree. We also hope to extend this collection in the future.

N/A