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Animated sprite editor & pixel art tool (Windows, macOS, Linux)

C++ 34,459 7,503 Updated Nov 12, 2025

Convert a Image to a COE file for Vivado

Python 9 Updated Apr 14, 2025

Tools to help students through ECE 385 - Digital Systems Laboratory

Python 31 11 Updated Dec 6, 2017

HiLoTOF -- Hardware-in-the-Loop Test framework for Open FPGAs

Verilog 13 3 Updated Feb 9, 2019
SystemVerilog 2 Updated Nov 13, 2024
SystemVerilog 1 Updated Oct 11, 2025
SystemVerilog 5 Updated Dec 13, 2022

This repository is an implementation of an OV7670 Camera with an AMD Urbana board equipped with a Spartan 7 FPGA.

SystemVerilog 3 Updated May 2, 2024

2D-to-3D image generator and viewer: https://tiefling.app

JavaScript 112 13 Updated Aug 10, 2025

ASIC implementation flow infrastructure

Python 171 35 Updated Nov 12, 2025

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

Python 1,628 407 Updated Sep 15, 2025

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

Python 3,314 431 Updated Oct 28, 2024

OV7670 camera controller for FPGA written in VHDL

VHDL 4 1 Updated May 29, 2024

Smart camera with OV 7670 and Zynq

C++ 46 16 Updated May 17, 2022

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

Verilog 67 6 Updated Nov 2, 2021

Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps

Verilog 70 10 Updated Nov 15, 2021

This code is used to connect the OV7670 Camera to a NEXYS4 and then display the image on a monitor in Verilog

Verilog 31 7 Updated Nov 20, 2018

A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 x 480 resolution, 30 fps.

Verilog 22 1 Updated Mar 18, 2023

Verilog modules required to get the OV7670 camera working

Verilog 75 35 Updated Jul 26, 2018

Reconstructing NES game console on Altera DE1-SOC FPGA using System Verilog

HTML 51 15 Updated May 12, 2017

Learn about image processing with an FPGA. Video lectures explain algorithm and implementation of lane detection for automotive driving. Real hardware is available as a remote lab.

VHDL 44 21 Updated May 15, 2024

The official repository for the gem5 computer-system architecture simulator.

C++ 2,290 1,579 Updated Nov 11, 2025

A Macintosh Plus inside an FPGA

SystemVerilog 48 3 Updated Oct 2, 2025

Classic Macintosh emulator

Rust 413 11 Updated Nov 11, 2025

MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog

Verilog 1,010 79 Updated Dec 15, 2022

📊 A minimalist, self-hosted WakaTime-compatible backend for coding statistics

Go 3,859 249 Updated Nov 7, 2025

Awesome ASIC design verification

331 77 Updated Feb 9, 2022

A curated list of Computer Architecture and Systems resources

563 63 Updated Oct 11, 2025

A collection of retro controller USB adapters (SNES, NES, Mega Drive/Genesis, Master System, Atari, Commodore, Amiga and Amiga CD32)

C++ 346 70 Updated Nov 9, 2022

RISC-V Instruction Set Manual

TeX 4,353 771 Updated Nov 11, 2025
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