uCore modificaiton of grp64, cod-lab-2022.

• Supports 8bit-colored 200x150 VGA, 1bit-colored 400x300 VGA.
• Map serial output to VGA display (1bit-colored)
• VGA player on Flash (8bit-colore)

ucore for riscv32 is a porting of ucore_os_lab to RISC-V architecture (privileged spec 1.10). It's built on top of the OpenSBI, a supervisor execution environment for RISC-V systems.

Install prebuilt RISC‑V GCC Toolchain from SiFive:

• Ubuntu
• macOS

$ export RISCV=/path/to/install/riscv/toolchain
$ export PATH=$RISCV/bin:$PATH

Linux: build from source

$ sudo apt install libgtk-3-dev libsdl2-dev
$ wget https://download.qemu.org/qemu-5.1.0.tar.xz 
$ tar xJf qemu-5.1.0.tar.xz > /dev/null
$ cd qemu-5.1.0
$ ./configure --target-list=riscv32-softmmu
$ make
$ cp riscv32-softmmu/qemu-system-riscv32 $RISCV/bin

macOS: install from Homebrew

$ brew install qemu

$ git clone -b riscv32-priv-1.10 --single-branch  https://github.com/chyyuu/ucore_os_lab

To build all projects at once, run the following commands

$ cd labcodes_answer
$ ./gccbuildall.sh

lab0: preparing
lab1: boot/protect mode/stack/interrupt
lab2: physical memory management
lab3: virtual memory management
lab4: kernel thread management
lab5: user process management
lab6: scheduling
lab7: mutex/sync
lab8: filesystem

Detailed documentation can be found in docs directory.

• Yu Chen: yuchen AT tsinghua.edu.cn
• Yong, Xiang: [email protected]
• Mao, Junjie: [email protected]
• Wei Zhang: zhangwei15 AT mails.tsinghua.edu.cn