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AEX board configuration for single chip setup

Status: Open.

#30 In inincs/pyNCS;

· r-harsha opened on Feb 2, 2017

Request: AMDA board clock

Status: Open.

#27 In inincs/pyNCS;

· r-harsha opened on Jan 13, 2016

NHML AER address specification (PIN layout)

Status: Open.

#24 In inincs/pyNCS;

· federicohyo opened on Aug 19, 2014

populate_by_id, populate_by_topology

enhancement

Status: Open.

#23 In inincs/pyNCS;

· eneftci opened on Mar 3, 2014

MemoryError due to synaptic parameters

enhancement

question

Status: Open.

#22 In inincs/pyNCS;

· eneftci opened on Feb 14, 2014

Documentation (Docstrings) for connection fashion

enhancement

Status: Open.

#20 In inincs/pyNCS;

· eneftci opened on Jun 6, 2013

mean rate plot

Status: Open.

#19 In inincs/pyNCS;

· r-harsha opened on May 22, 2013

Please release (and provide pyNCS.__version__)

Status: Open.

#17 In inincs/pyNCS;

· yarikoptic opened on Apr 11, 2013

Use Physical address inplace of logical addresses for SpikeLists

enhancement

Status: Open.

#16 In inincs/pyNCS;

· sheiksadique opened on Feb 20, 2013

A "canonical" pyAEX-like module: lab streaming layer

enhancement

Status: Open.

#12 In inincs/pyNCS;

· eneftci opened on Jan 23, 2013

alternatives to chaco/traits

enhancement

Status: Open.

#8 In inincs/pyNCS;

· fabioedoardoluigialberto opened on Nov 7, 2012

interactive visualization of mappings: xdot?

enhancement

Status: Open.

#7 In inincs/pyNCS;

· fabioedoardoluigialberto opened on Nov 7, 2012