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AMD RAD's multi-GPU Triton-based framework for seamless multi-GPU programming
Fast and accurate AI powered file content types detection
Run LLMs on AMD Ryzen™ AI NPUs in minutes. Just like Ollama - but purpose-built and deeply optimized for the AMD NPUs.
An MLIR-based toolchain for AMD AI Engine-enabled devices.
antonio-fc / lofty_Ryzen_NPU
Forked from Xilinx/mlir-aieThis repository contains the source code for the master's thesis titled "Exploration of the AMD Ryzen NPU for Real-time Signal Processing", submitted to Technische Universiteit Delft for the MSc. C…
IREE plugin repository for the AMD AIE accelerator
C/C++ frontend for MLIR. Also features polyhedral optimizations, parallel optimizations, and more!
andrej / mlir-aie
Forked from Xilinx/mlir-aieAn MLIR-based toolchain for Xilinx Versal AIEngine-based devices.
jackl-xilinx / PYNQ
Forked from Xilinx/PYNQPython Productivity for ZYNQ
jgmelber / embeddedsw
Forked from Xilinx/embeddedswXilinx Embedded Software (embeddedsw) Development
JinmingZhuang / mlir-aie
Forked from Xilinx/mlir-aieAn MLIR-based toolchain for Xilinx Versal AIEngine-based devices.
An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE
TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.
Run compilers interactively from your web browser and interact with the assembly
Learning to See in the Dark. CVPR 2018
Benchmarking Analysis of Vision Kernels on Embedded CPU, GPU and FPGA
Python requests like API built on top of Twisted's HTTP client.