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1. MAGIA MAGIA Public

   Forked from pulp-platform/MAGIA

   Large-scale 2D mesh system with dedicated GeMM, on-chip RDMA and Rendez-vous accelerators.

   SystemVerilog

2. cvfpu cvfpu Public

   Forked from openhwgroup/cvfpu

   Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

   SystemVerilog

3. MAGIA-EventUnit MAGIA-EventUnit Public

   Magia_Tile with Event Unit, also using mm control for fsync, redmule and idma

   SystemVerilog

4. obi obi Public

   Forked from pulp-platform/obi

   OBI SystemVerilog synthesizable interconnect IPs for on-chip communication

   SystemVerilog

5. axi axi Public

   Forked from pulp-platform/axi

   AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

   SystemVerilog

6. cv32e40p cv32e40p Public

   Forked from pulp-platform/cv32e40p

   CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

   SystemVerilog