[ImportVerilog] Add support for $stop/$finish/$exit #7634
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Add support for the simulation control system tasks `$stop`, `$finish`, and `$exit`. Also add corresponding ops to the Moore dialect that handle the orthogonal pieces of functionality represented by these tasks.
terapines-osc-circt
approved these changes
Sep 27, 2024
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| The exit code argument of this op is not directly accessible from Verilog, | ||
| but is used to distinguish between the implicit `$finish` call in `$fatal` | ||
| and an explicit `$finish` called by the user. |
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I don't have any questions.
nit: Maybe we could explicitly notify moore.builtin.finish 0 representing an explicit $finish called, 1 is implicit $finish.
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Yeah we could add a marker for that. For example a implicit unit attribute to distinguish it from the exit code.
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Add support for the simulation control system tasks
$stop,$finish, and$exit. Also add corresponding ops to the Moore dialect that handle the orthogonal pieces of functionality represented by these tasks.