fmcjesdadc1/a5gt- max delay fit only

daq2/kcu105- intc configurations

usb_fx3: Switch PS7 UART to UARTLITE to communicate with the FX3 board

axi_dacfifo: Optimize the AXI read logic

Save the valid AXI beats number of the last AXI transaction, and the valid
DMA beats number of the last AXI beat, so the read back logic can use this
data and prevent to feel up the CDC memory with invalid samples. Also in
this way the end of the read back cycle get a more robust control: no more
duplicated samples at the end of the buffer.

DAQ2 A10GX 10AX115S3F45E2SGE3 version

Updated interfaces Makefile and Makefiles for the libraries that depe…

…nd on it

2015_r1 release

2014_r2 release

adcfifo: unused process

2014_r1 release